摘要
A sub-1V fourth-order bandpass delta-sigma modulator is presented in this paper. Using the switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without using voltage multipliers or bootstrapping switches. A two-path structure is applied to relax the settling requirement. Implemented in a 0.25-μm one-poly, five-metal standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-distortion ratio (SNDR) of 58.2 db and a dynamic range (DR) of 64 db in a 60 KHz signal bandwidth centered at 1.25 MHz while consuming 2.5 mW and occupying an active area of 2.11 mm 2.
原文 | 英語 |
---|---|
頁(從 - 到) | 179-189 |
頁數 | 11 |
期刊 | Analog Integrated Circuits and Signal Processing |
卷 | 37 |
發行號 | 3 |
DOIs | |
出版狀態 | 已發佈 - 2003 12月 |
對外發佈 | 是 |
ASJC Scopus subject areas
- 訊號處理
- 硬體和架構
- 表面、塗料和薄膜