TY - GEN
T1 - A quadruple-sampling second-order delta-sigma modulator
AU - Kuo, Chien Hung
AU - Tseng, Wei Wei
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/12/27
Y1 - 2016/12/27
N2 - In this paper, a 1.8-V 3-bit quadruple-sampling delta-sigma modulator for audio application is presented. To performance high-resolution and low-cost modulator, a single opamp is used to complete the integration with four phases. Since the phase difference between any two succeeding clocks is 90 degrees, the sampling rate will be four times of clock frequency. The effective integration time can also be increased, and thus relaxing the requirements of opamp. From the simulation results, the proposed modulator achieves a peak SNDR of 104.5 dB for 20-kHz signal bandwidth under 1.8-V supply voltage and 2.56 MHz clock rate.
AB - In this paper, a 1.8-V 3-bit quadruple-sampling delta-sigma modulator for audio application is presented. To performance high-resolution and low-cost modulator, a single opamp is used to complete the integration with four phases. Since the phase difference between any two succeeding clocks is 90 degrees, the sampling rate will be four times of clock frequency. The effective integration time can also be increased, and thus relaxing the requirements of opamp. From the simulation results, the proposed modulator achieves a peak SNDR of 104.5 dB for 20-kHz signal bandwidth under 1.8-V supply voltage and 2.56 MHz clock rate.
KW - Multibit DSM
KW - Quadruple-Sampling
KW - Time-Interleaved
UR - http://www.scopus.com/inward/record.url?scp=85010417494&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85010417494&partnerID=8YFLogxK
U2 - 10.1109/GCCE.2016.7800473
DO - 10.1109/GCCE.2016.7800473
M3 - Conference contribution
AN - SCOPUS:85010417494
T3 - 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016
BT - 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 5th IEEE Global Conference on Consumer Electronics, GCCE 2016
Y2 - 11 October 2016 through 14 October 2016
ER -