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A Dual-Gate-Controlled Single-Electron Transistor Using Self-Aligned Polysilicon Sidewall Spacer Gates on Silicon-on-Insulator Nanowire

  • Shu Fen Hu*
  • , Yung Chun Wu
  • , Chin Lung Sung
  • , Chun Yen Chang
  • , Tiao Yuan Huang
  • *此作品的通信作者

研究成果: 雜誌貢獻 › 期刊論文 › 同行評審

20   連結會在新分頁中打開 引文 斯高帕斯(Scopus)

摘要

A dual-gate-controlled single-electron transistor was fabricated by using self-aligned polysilicon sidewall spacer gates on a silicon-on-insulator nanowire. The quantum dot formed by the electric field effect of the dual-gate structure was miniaturized to smaller than the state-of-the-art feature size, through a combination of electron beam lithography, oxidation, and polysilicon sidewall spacer gate formation processes. The device shows typical MOSFET I-V characteristics at room temperature. However, the Coulomb gap and Coulomb oscillations are clearly observed at 4 K.

原文英語
頁(從 - 到)93-97
頁數5
期刊IEEE Transactions on Nanotechnology
卷3
發行號1 SPEC. ISS.
DOIs
出版狀態已發佈 - 2004 3月
對外發佈是

ASJC Scopus subject areas

  • 電腦科學應用
  • 電氣與電子工程

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