A delta-sigma modulator-based class-D amplifier

Chien Hung Kuo, Sheng Chi Lin

研究成果: 書貢獻/報告類型會議貢獻

摘要

A new architecture of class-D amplifier with a multibit delta-sigma modulator control is presented in this paper. In the presented amplifier, the 3-bit 8-level digital outputs of the second-order delta-sigma modulator are utilized to generate switching signals with different pulse widths for the class-D power amplifier. A closed-loop class-D amplifier is adopted by feeding the analog output signal from the power stage to the input to improve the linearity. The presented class-D amplifier is simulated with TSMC 0.18-μm CMOS process. The SNDR of the proposed amplifier is 78 dB within a 25 kHz signal bandwidth under a sample rate of 2.56 MHz. The THD is 0.01% at a power consumption of 140 mW.

原文英語
主出版物標題2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781509023332
DOIs
出版狀態已發佈 - 2016 十二月 27
事件5th IEEE Global Conference on Consumer Electronics, GCCE 2016 - Kyoto, 日本
持續時間: 2016 十月 112016 十月 14

出版系列

名字2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016

其他

其他5th IEEE Global Conference on Consumer Electronics, GCCE 2016
國家日本
城市Kyoto
期間16/10/1116/10/14

    指紋

ASJC Scopus subject areas

  • Signal Processing
  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Hardware and Architecture
  • Instrumentation

引用此

Kuo, C. H., & Lin, S. C. (2016). A delta-sigma modulator-based class-D amplifier. 於 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016 [7800440] (2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/GCCE.2016.7800440