A 91dB SOP-based low-voltage low-distortion fourth-order 2-2 cascaded delta-sigma modulator

Chien Hung Kuo*, Shuo Chau Chen, Kang Shuo Chang

*此作品的通信作者

研究成果: 書貢獻/報告類型會議論文篇章

2 引文 斯高帕斯(Scopus)

摘要

In this paper, a low-voltage switched-opamp-based 2-2 cascaded switehed-capacitor delta-sigma modulator in a 0.18-μm 1P6M CMOS technology is presented. The fourth-order modulator is realized using a low-distortion feed-forward topology to promote its linearity and dynamic range. The presented modulator can be operated in a wide range of supply voltage from 1.8V to 0.9V. The switched-opamp with double output stage is utilized to combine with the double-sampling technique so that the effective clocking rate can be reduced, thus also relaxing the requirement of opamp. The modulator achieves a 91 dB of SNDR within 24 kHz signal bandwidth under a 2 MHz of clocking rate. The total power consumption of this modulator is 0.86 mW under a 1V supply voltage and the chip core area is 1.57mm2.

原文英語
主出版物標題Proceedings of the Fourth IASTED International Conference on Circuits, Signals, and Systems, CSS 2006
頁面199-204
頁數6
出版狀態已發佈 - 2006
對外發佈
事件4th IASTED International Conference on Circuits, Signals, and Systems, CSS 2006 - San Francisco, CA, 美国
持續時間: 2006 十一月 202006 十一月 22

出版系列

名字Proceedings of the Fourth IASTED International Conference on Circuits, Signals, and Systems, CSS 2006

其他

其他4th IASTED International Conference on Circuits, Signals, and Systems, CSS 2006
國家/地區美国
城市San Francisco, CA
期間2006/11/202006/11/22

ASJC Scopus subject areas

  • 控制與系統工程
  • 電氣與電子工程

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