A 60-GHz power amplifier design using dual-radial symmetric architecture in 90-nm low-power CMOS

Jin Fu Yeh, Jeng Han Tsai, Tian Wei Huang

研究成果: 雜誌貢獻文章同行評審

31 引文 斯高帕斯(Scopus)

摘要

An innovative on-chip 3-D power amplifier (PA) architecture for M-way power-combined CMOS PAs by using the proposed dual-radial symmetric architecture is presented. It provides design freedom of impedance selection of power device in transformer-based millimeter-wave PA design. This idea also makes distinguished breakthrough to the traditional 2-D PA architecture without compromising symmetry and compact size of layout. To demonstrate the feasibility of this idea, a 60-GHz PA is fabricated in 90-nm low-power CMOS process. It is also equipped with multi-mode operation. It achieves an output power of 18.5 dBm and a power-added efficiency of 10.2% with 1.2-V supply voltage. At 6-dB/10-dB power back-off operation, the drain efficiencies of power stage can be enhanced from 5.9%/2.4% to 11.9%/8%, respectively, by enabling the multi-mode operation.

原文英語
文章編號6461114
頁(從 - 到)1280-1290
頁數11
期刊IEEE Transactions on Microwave Theory and Techniques
61
發行號3
DOIs
出版狀態已發佈 - 2013 二月 15

ASJC Scopus subject areas

  • Radiation
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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