A 60-GHz power amplifier design using dual-radial symmetric architecture in 90-nm low-power CMOS

Jin Fu Yeh, Jeng Han Tsai, Tian Wei Huang

研究成果: 雜誌貢獻文章

29 引文 (Scopus)

摘要

An innovative on-chip 3-D power amplifier (PA) architecture for M-way power-combined CMOS PAs by using the proposed dual-radial symmetric architecture is presented. It provides design freedom of impedance selection of power device in transformer-based millimeter-wave PA design. This idea also makes distinguished breakthrough to the traditional 2-D PA architecture without compromising symmetry and compact size of layout. To demonstrate the feasibility of this idea, a 60-GHz PA is fabricated in 90-nm low-power CMOS process. It is also equipped with multi-mode operation. It achieves an output power of 18.5 dBm and a power-added efficiency of 10.2% with 1.2-V supply voltage. At 6-dB/10-dB power back-off operation, the drain efficiencies of power stage can be enhanced from 5.9%/2.4% to 11.9%/8%, respectively, by enabling the multi-mode operation.

原文英語
文章編號6461114
頁(從 - 到)1280-1290
頁數11
期刊IEEE Transactions on Microwave Theory and Techniques
61
發行號3
DOIs
出版狀態已發佈 - 2013 二月 15

指紋

amplifier design
power amplifiers
Power amplifiers
CMOS
Wave power
power efficiency
Millimeter waves
transformers
layouts
millimeter waves
chips
impedance
output
Electric potential
electric potential
symmetry

ASJC Scopus subject areas

  • Radiation
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

引用此文

A 60-GHz power amplifier design using dual-radial symmetric architecture in 90-nm low-power CMOS. / Yeh, Jin Fu; Tsai, Jeng Han; Huang, Tian Wei.

於: IEEE Transactions on Microwave Theory and Techniques, 卷 61, 編號 3, 6461114, 15.02.2013, p. 1280-1290.

研究成果: 雜誌貢獻文章

@article{dfc8363374734d139f24931133b0bcfc,
title = "A 60-GHz power amplifier design using dual-radial symmetric architecture in 90-nm low-power CMOS",
abstract = "An innovative on-chip 3-D power amplifier (PA) architecture for M-way power-combined CMOS PAs by using the proposed dual-radial symmetric architecture is presented. It provides design freedom of impedance selection of power device in transformer-based millimeter-wave PA design. This idea also makes distinguished breakthrough to the traditional 2-D PA architecture without compromising symmetry and compact size of layout. To demonstrate the feasibility of this idea, a 60-GHz PA is fabricated in 90-nm low-power CMOS process. It is also equipped with multi-mode operation. It achieves an output power of 18.5 dBm and a power-added efficiency of 10.2{\%} with 1.2-V supply voltage. At 6-dB/10-dB power back-off operation, the drain efficiencies of power stage can be enhanced from 5.9{\%}/2.4{\%} to 11.9{\%}/8{\%}, respectively, by enabling the multi-mode operation.",
keywords = "3-D power amplifier (PA) architecture, CMOS, dual-radial, folded-transformer, multi-mode operation, radial combining network, radial power distribution network",
author = "Yeh, {Jin Fu} and Tsai, {Jeng Han} and Huang, {Tian Wei}",
year = "2013",
month = "2",
day = "15",
doi = "10.1109/TMTT.2013.2243746",
language = "English",
volume = "61",
pages = "1280--1290",
journal = "IEEE Transactions on Microwave Theory and Techniques",
issn = "0018-9480",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "3",

}

TY - JOUR

T1 - A 60-GHz power amplifier design using dual-radial symmetric architecture in 90-nm low-power CMOS

AU - Yeh, Jin Fu

AU - Tsai, Jeng Han

AU - Huang, Tian Wei

PY - 2013/2/15

Y1 - 2013/2/15

N2 - An innovative on-chip 3-D power amplifier (PA) architecture for M-way power-combined CMOS PAs by using the proposed dual-radial symmetric architecture is presented. It provides design freedom of impedance selection of power device in transformer-based millimeter-wave PA design. This idea also makes distinguished breakthrough to the traditional 2-D PA architecture without compromising symmetry and compact size of layout. To demonstrate the feasibility of this idea, a 60-GHz PA is fabricated in 90-nm low-power CMOS process. It is also equipped with multi-mode operation. It achieves an output power of 18.5 dBm and a power-added efficiency of 10.2% with 1.2-V supply voltage. At 6-dB/10-dB power back-off operation, the drain efficiencies of power stage can be enhanced from 5.9%/2.4% to 11.9%/8%, respectively, by enabling the multi-mode operation.

AB - An innovative on-chip 3-D power amplifier (PA) architecture for M-way power-combined CMOS PAs by using the proposed dual-radial symmetric architecture is presented. It provides design freedom of impedance selection of power device in transformer-based millimeter-wave PA design. This idea also makes distinguished breakthrough to the traditional 2-D PA architecture without compromising symmetry and compact size of layout. To demonstrate the feasibility of this idea, a 60-GHz PA is fabricated in 90-nm low-power CMOS process. It is also equipped with multi-mode operation. It achieves an output power of 18.5 dBm and a power-added efficiency of 10.2% with 1.2-V supply voltage. At 6-dB/10-dB power back-off operation, the drain efficiencies of power stage can be enhanced from 5.9%/2.4% to 11.9%/8%, respectively, by enabling the multi-mode operation.

KW - 3-D power amplifier (PA) architecture

KW - CMOS

KW - dual-radial

KW - folded-transformer

KW - multi-mode operation

KW - radial combining network

KW - radial power distribution network

UR - http://www.scopus.com/inward/record.url?scp=84874950551&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84874950551&partnerID=8YFLogxK

U2 - 10.1109/TMTT.2013.2243746

DO - 10.1109/TMTT.2013.2243746

M3 - Article

AN - SCOPUS:84874950551

VL - 61

SP - 1280

EP - 1290

JO - IEEE Transactions on Microwave Theory and Techniques

JF - IEEE Transactions on Microwave Theory and Techniques

SN - 0018-9480

IS - 3

M1 - 6461114

ER -