@article{b4c45572a2bc46d6a1a65b7af13179bd,
title = "A 60 GHz CMOS power amplifier with built-in pre-distortion linearizer",
abstract = "A built-in pre-distortion linearizer using cold-mode MOSFET with forward body bias is presented for 60 GHz CMOS PA linearization on 90 nm CMOS LP process. The power amplifier (PA) achieves a P sat of 10.72 dBm and OP 1 dB of 7.3 dBm from 1.2 V supply. After linearization, the OP 1 dB has been doubled from 7.3 to 10.2 dBm and the operating PAE at OP 1 dB consequently improves from 5.4% to 10.8%. The optimum improvement of the IMD3 is 25 dB.",
keywords = "60 GHz, CMOS, linearization, linearizer, power amplifier (PA), pre-distortion",
author = "Tsai, {Jeng Han} and Wu, {Chung Han} and Yang, {Hong Yuan} and Huang, {Tian Wei}",
note = "Funding Information: Manuscript received November 16, 2010; revised July 30, 2011; accepted October 02, 2011. Date of publication November 07, 2011; date of current version December 07, 2011. This work was supported in part by the National Science Council of Taiwan under Grant NSC 99-2219-E-002-011, Grant NSC 100-2219-E-002-007, Grant NSC 98-2221-E-003-024-MY2, and Grant NSC NSC 100-2221-E-003-027.",
year = "2011",
month = dec,
doi = "10.1109/LMWC.2011.2171929",
language = "English",
volume = "21",
pages = "676--678",
journal = "IEEE Microwave and Wireless Components Letters",
issn = "1531-1309",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "12",
}