A 6-GHz spread spectrum clock generation with EMI reduction of 30.2 dB for SATA-III applications

Hamed Alsuraisry, Jen Hao Cheng, Jian An Lin, Yen Hong Kuo, Jeng Han Tsai, Tian Wei Huang

研究成果: 雜誌貢獻期刊論文同行評審

2 引文 斯高帕斯(Scopus)

摘要

In this letter, a 6-GHz spread spectrum clock generation for Serial AT Attachment Generation 3 (SATA—III) applications in 0.18-pm CMOS technology is presented. The 3rd-order loop filter is to reduce the ripple of control voltage of VCO and the loop bandwidth is 625 KHz. With the aid of second-order delta-sigma (ΔΣ) modulator and triangular profile counter, the division ratio of divider chain can be changed periodically. The modulation frequency is 37.04 KHz with upper bound of 19 for the triangular profile counter. The proposed circuit spreads 30-MHz frequency range from 5.97 to 6.0 GHz with an EMI reduction of 20.3 dB. The dc power consumption is 34 mW with a chip size of 0.54 mm2.

原文英語
頁(從 - 到)622-624
頁數3
期刊Microwave and Optical Technology Letters
59
發行號3
DOIs
出版狀態已發佈 - 2017 三月 1

ASJC Scopus subject areas

  • 電子、光磁材料
  • 原子與分子物理與光學
  • 凝聚態物理學
  • 電氣與電子工程

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