A 5564 GHz fully-integrated sub-harmonic wideband transceiver in 130 nm CMOS process

Jeng Han Tsai*

*此作品的通信作者

研究成果: 雜誌貢獻期刊論文同行評審

16 引文 斯高帕斯(Scopus)

摘要

In this letter, a 5564 GHz compact fully-integrated gigabit transceiver with sub-harmonic pump technique is presented. The transceiver consists of a single-pole-double-throw (SPDT) traveling wave switch, a low-noise amplifier (LNA), a buffer amplifier (BA), and two sub-harmonic resistive mixers for up-conversion and down-conversion, respectively. The transceiver using 130 nm standard CMOS technology achieves an up-conversion gain of 7.4 dB at 62 GHz and down-conversion gain of 7.2 dB at 60 GHz with a compact chip size of 1.2 mm 2The 3 dB frequency bandwidth ranges from 55 to 64 GHz, which can cover the whole frequency band for 802.15.TG3C WPAN applications. For system applications, gigabit BPSK modulation signal test is successfully performed in this work.

原文英語
文章編號5290006
頁(從 - 到)758-760
頁數3
期刊IEEE Microwave and Wireless Components Letters
19
發行號11
DOIs
出版狀態已發佈 - 2009 十一月

ASJC Scopus subject areas

  • 凝聚態物理學
  • 電氣與電子工程

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