A 5.2 GHz haft-watt fully-integrated CMOS power amplifier

Jeng Han Tsai; Chen Fang Lin; Po Chun Shen; Hong Wun Ou-Yang

doi:10.1109/GCCE46687.2019.9015402

A 5.2 GHz haft-watt fully-integrated CMOS power amplifier

Jeng Han Tsai^*, Chen Fang Lin, Po Chun Shen, Hong Wun Ou-Yang

^*此作品的通信作者

電機工程學系

研究成果: 書貢獻/報告類型 › 會議論文篇章

1 引文斯高帕斯（Scopus）

摘要

A 5.2 GHz fully-integrated power amplifier is designed and fabricated using 0.18-μm 1P6M bulk CMOS technology. Utilizing a 2-way series combining transformer, the CMOS PA achieves a measured maximum saturation output power (Psat) of 27.6 dBm at 5.2 GHz within a compact chip size of 1.2 mm × 1 mm. The measured small signal gain is 13.4 dB, the output 1-dB compression point (OP1dB) is 23.5 dBm, and the peak power-added efficiency (PAE) is 19.2 % at 5.2 GHz. For IEEE 802.11ac WLAN 64-QAM OFDM modulation signal test, the PA meets the EVM requirement of 5.6% (-25 dB) at the linear output power of 16.6 dBm.

原文	英語
主出版物標題	2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	407-408
頁數	2
ISBN（電子）	9781728135755
DOIs	https://doi.org/10.1109/GCCE46687.2019.9015402
出版狀態	已發佈 - 2019 10月
事件	8th IEEE Global Conference on Consumer Electronics, GCCE 2019 - Osaka, 日本持續時間: 2019 10月 15 → 2019 10月 18

出版系列

名字	2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019

會議

會議	8th IEEE Global Conference on Consumer Electronics, GCCE 2019
國家/地區	日本
城市	Osaka
期間	2019/10/15 → 2019/10/18

ASJC Scopus subject areas

儀器
人工智慧
電腦網路與通信
電腦科學應用
電氣與電子工程

存取文件

10.1109/GCCE46687.2019.9015402

其它文件與鏈接

引用此

Tsai, J. H., Lin, C. F., Shen, P. C., & Ou-Yang, H. W. (2019). A 5.2 GHz haft-watt fully-integrated CMOS power amplifier. 於 2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019 (頁 407-408). 文章 9015402 (2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/GCCE46687.2019.9015402

A 5.2 GHz haft-watt fully-integrated CMOS power amplifier. / Tsai, Jeng Han; Lin, Chen Fang; Shen, Po Chun 等.
2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 407-408 9015402 (2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019).

研究成果: 書貢獻/報告類型 › 會議論文篇章

Tsai, JH, Lin, CF, Shen, PC & Ou-Yang, HW 2019, A 5.2 GHz haft-watt fully-integrated CMOS power amplifier. 於 2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019., 9015402, 2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019, Institute of Electrical and Electronics Engineers Inc., 頁 407-408, 8th IEEE Global Conference on Consumer Electronics, GCCE 2019, Osaka, 日本, 2019/10/15. https://doi.org/10.1109/GCCE46687.2019.9015402

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title = "A 5.2 GHz haft-watt fully-integrated CMOS power amplifier",

abstract = "A 5.2 GHz fully-integrated power amplifier is designed and fabricated using 0.18-μm 1P6M bulk CMOS technology. Utilizing a 2-way series combining transformer, the CMOS PA achieves a measured maximum saturation output power (Psat) of 27.6 dBm at 5.2 GHz within a compact chip size of 1.2 mm × 1 mm. The measured small signal gain is 13.4 dB, the output 1-dB compression point (OP1dB) is 23.5 dBm, and the peak power-added efficiency (PAE) is 19.2 % at 5.2 GHz. For IEEE 802.11ac WLAN 64-QAM OFDM modulation signal test, the PA meets the EVM requirement of 5.6% (-25 dB) at the linear output power of 16.6 dBm.",

keywords = "CMOS, Power amplifier (PA), Radio frequency integrated circuit (RFIC), Transformer",

author = "Tsai, {Jeng Han} and Lin, {Chen Fang} and Shen, {Po Chun} and Ou-Yang, {Hong Wun}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 8th IEEE Global Conference on Consumer Electronics, GCCE 2019 ; Conference date: 15-10-2019 Through 18-10-2019",

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doi = "10.1109/GCCE46687.2019.9015402",

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AU - Tsai, Jeng Han

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AU - Shen, Po Chun

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Y1 - 2019/10

N2 - A 5.2 GHz fully-integrated power amplifier is designed and fabricated using 0.18-μm 1P6M bulk CMOS technology. Utilizing a 2-way series combining transformer, the CMOS PA achieves a measured maximum saturation output power (Psat) of 27.6 dBm at 5.2 GHz within a compact chip size of 1.2 mm × 1 mm. The measured small signal gain is 13.4 dB, the output 1-dB compression point (OP1dB) is 23.5 dBm, and the peak power-added efficiency (PAE) is 19.2 % at 5.2 GHz. For IEEE 802.11ac WLAN 64-QAM OFDM modulation signal test, the PA meets the EVM requirement of 5.6% (-25 dB) at the linear output power of 16.6 dBm.

AB - A 5.2 GHz fully-integrated power amplifier is designed and fabricated using 0.18-μm 1P6M bulk CMOS technology. Utilizing a 2-way series combining transformer, the CMOS PA achieves a measured maximum saturation output power (Psat) of 27.6 dBm at 5.2 GHz within a compact chip size of 1.2 mm × 1 mm. The measured small signal gain is 13.4 dB, the output 1-dB compression point (OP1dB) is 23.5 dBm, and the peak power-added efficiency (PAE) is 19.2 % at 5.2 GHz. For IEEE 802.11ac WLAN 64-QAM OFDM modulation signal test, the PA meets the EVM requirement of 5.6% (-25 dB) at the linear output power of 16.6 dBm.

KW - CMOS

KW - Power amplifier (PA)

KW - Radio frequency integrated circuit (RFIC)

KW - Transformer

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A 5.2 GHz haft-watt fully-integrated CMOS power amplifier

摘要

出版系列

會議

ASJC Scopus subject areas

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