A 5.2 GHz haft-watt fully-integrated CMOS power amplifier

Jeng Han Tsai*, Chen Fang Lin, Po Chun Shen, Hong Wun Ou-Yang

*此作品的通信作者

研究成果: 書貢獻/報告類型會議論文篇章

摘要

A 5.2 GHz fully-integrated power amplifier is designed and fabricated using 0.18-μm 1P6M bulk CMOS technology. Utilizing a 2-way series combining transformer, the CMOS PA achieves a measured maximum saturation output power (Psat) of 27.6 dBm at 5.2 GHz within a compact chip size of 1.2 mm × 1 mm. The measured small signal gain is 13.4 dB, the output 1-dB compression point (OP1dB) is 23.5 dBm, and the peak power-added efficiency (PAE) is 19.2 % at 5.2 GHz. For IEEE 802.11ac WLAN 64-QAM OFDM modulation signal test, the PA meets the EVM requirement of 5.6% (-25 dB) at the linear output power of 16.6 dBm.

原文英語
主出版物標題2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019
發行者Institute of Electrical and Electronics Engineers Inc.
頁面407-408
頁數2
ISBN(電子)9781728135755
DOIs
出版狀態已發佈 - 2019 十月
事件8th IEEE Global Conference on Consumer Electronics, GCCE 2019 - Osaka, 日本
持續時間: 2019 十月 152019 十月 18

出版系列

名字2019 IEEE 8th Global Conference on Consumer Electronics, GCCE 2019

會議

會議8th IEEE Global Conference on Consumer Electronics, GCCE 2019
國家/地區日本
城市Osaka
期間2019/10/152019/10/18

ASJC Scopus subject areas

  • 儀器
  • 人工智慧
  • 電腦網路與通信
  • 電腦科學應用
  • 電氣與電子工程

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