A 24-GHz 3.8-dB NF low-noise amplifier with built-in linearizer

Yen Hung Kuo*, Jeng Han Tsai, Wei Hung Chou, Tian Wei Huang

*此作品的通信作者

研究成果: 書貢獻/報告類型會議論文篇章

6 引文 斯高帕斯(Scopus)

摘要

A K-band low-noise amplifier with built-in linearizer using 0.18-μm CMOS technology is presented in this paper. To achieve good linearity at high frequency, a distributed derivative superposition linearization technique is used. The measured results show that the improvement of IIP3 and IM3 are 5.3 dB and 10.6 dB at 24 GHz, respectively. The proposed LNA has a noise figure of 3.8 dB and a peak gain of 13.7 dB while consuming 18 mW dc power. To the best of our knowledge, this is the first LNA with a built-in linearizer above 20 GHz in CMOS.

原文英語
主出版物標題2010 Asia-Pacific Microwave Conference Proceedings, APMC 2010
頁面1505-1508
頁數4
出版狀態已發佈 - 2010
事件2010 Asia-Pacific Microwave Conference, APMC 2010 - Yokohama, 日本
持續時間: 2010 十二月 72010 十二月 10

出版系列

名字Asia-Pacific Microwave Conference Proceedings, APMC

其他

其他2010 Asia-Pacific Microwave Conference, APMC 2010
國家/地區日本
城市Yokohama
期間2010/12/072010/12/10

ASJC Scopus subject areas

  • 電氣與電子工程

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