TY - GEN
T1 - A 0.8V SOP-based cascade multibit delta-sigma modulator for wideband applications
AU - Kuo, Chien Hung
AU - Lee, Kuan Yi
AU - Chen, Shuo Chau
PY - 2008
Y1 - 2008
N2 - In this paper, a 0.8V switched-opamp (SOP)-based 22 cascade delta-sigma modulator for wideband applications is presented. The first stage uses low-distortion topology to release the requirement of SOP due to only the quantization noise in integrator path. The second stage employs a CIFB structure without the use of summer in front of the quantizer to decrease the power consumption. Double sampling technique combined with the SOP with two output stages is used to promote the clock efficiency. The proposed fourth-order ΔΣ modulator with CIFF-CIFB structure has been implemented in a 0.13μm CMOS 1P8M technology. The core area excluding PADs is 1.66×1.62 mm2. The peak signal-to-noise plus distortion ratio (SNDR) and dynamic range (DR) of the presented modulator within a 1.1 MHz of bandwidth are 77.9 dB and 85 dB, respectively, under a 20 MHz of clock rate. The power dissipation of the presented ΔΣ modulator is 15.7 mW at a 0.8V of supply voltage.
AB - In this paper, a 0.8V switched-opamp (SOP)-based 22 cascade delta-sigma modulator for wideband applications is presented. The first stage uses low-distortion topology to release the requirement of SOP due to only the quantization noise in integrator path. The second stage employs a CIFB structure without the use of summer in front of the quantizer to decrease the power consumption. Double sampling technique combined with the SOP with two output stages is used to promote the clock efficiency. The proposed fourth-order ΔΣ modulator with CIFF-CIFB structure has been implemented in a 0.13μm CMOS 1P8M technology. The core area excluding PADs is 1.66×1.62 mm2. The peak signal-to-noise plus distortion ratio (SNDR) and dynamic range (DR) of the presented modulator within a 1.1 MHz of bandwidth are 77.9 dB and 85 dB, respectively, under a 20 MHz of clock rate. The power dissipation of the presented ΔΣ modulator is 15.7 mW at a 0.8V of supply voltage.
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U2 - 10.1109/APCCAS.2008.4746247
DO - 10.1109/APCCAS.2008.4746247
M3 - Conference contribution
AN - SCOPUS:62949147714
SN - 9781424423422
T3 - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
SP - 1224
EP - 1227
BT - Proceedings of APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
T2 - APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
Y2 - 30 November 2008 through 3 December 2008
ER -