A 0.7-mW V-Band Transformer-Based Positive- Feedback Receiver Front-End in a 65-nm CMOS

Yi Hsien Lin, Shao Cheng Hsiao, Jeng Han Tsai, Tian Wei Huang

研究成果: 雜誌貢獻文章

摘要

In this letter, we propose an ultralow-power transformer-based V-band receiver front-end using a 65-nm CMOS technology. Forward-body-bias and transformer-based positive-feedback topologies are utilized to enable its operation at a low drain bias of 0.3 V, while still ensuring its gain performance. A resistive ring mixer, with its advantage of zero-dc-power consumption, serves as the frequency down-converter of the system. The proposed receiver front-end demonstrates an 8.5-dB conversion gain and possesses the power-saving ability to use only 0.7 mW of dc-power consumption.

原文英語
文章編號9082675
頁(從 - 到)613-616
頁數4
期刊IEEE Microwave and Wireless Components Letters
30
發行號6
DOIs
出版狀態已發佈 - 2020 六月

ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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