每年研究成果
每年研究成果
指紋
查看啟用 Chuan-Hsi Liu 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
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Bi-directional Sub-60mV/dec, Hysteresis-Free, Reducing Onset Voltage and High Speed Response of Ferroelectric-AntiFerroelectric Hf0.25Zr0.75O2 Negative Capacitance FETs
Lee, M. H., Lin, Y. Y., Yang, Y. J., Hsieh, F. C., Chang, S. T., Liao, M. H., Li, K. S., Liu, C. W., Chen, K. T., Liao, C. Y., Siang, G. Y., Lo, C., Chen, H. Y., Tseng, Y. J., Chueh, C. Y. & Chang, C., 2019 十二月, 2019 IEEE International Electron Devices Meeting, IEDM 2019. Institute of Electrical and Electronics Engineers Inc., 8993581. (Technical Digest - International Electron Devices Meeting, IEDM; 卷 2019-December).研究成果: 書貢獻/報告類型 › 會議論文篇章
1 引文 斯高帕斯（Scopus） -
Embedded PUF on 14nm HKMG FinFET Platform: A Novel 2-bit-per-cell OTP-based Memory Feasible for IoT Secuirty Solution in 5G Era
Hsieh, E. R., Wang, H. W., Liu, C. H., Chung, S. S., Chen, T. P., Huang, S. A., Chen, T. J. & Cheng, O., 2019 六月, 2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. T118-T119 8776515. (Digest of Technical Papers - Symposium on VLSI Technology; 卷 2019-June).研究成果: 書貢獻/報告類型 › 會議論文篇章
1 引文 斯高帕斯（Scopus） -
Integration of ARCS motivational model and it to enhance students learning in the context of atayal culture
Chao, J., Jiang, T. W., Yeh, Y. H., Liu, C. H. & Lin, C. M., 2019 一月 1, 於: Eurasia Journal of Mathematics, Science and Technology Education. 15, 11, em1771.研究成果: 雜誌貢獻 › 期刊論文 › 同行評審
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The guideline on designing a high performance nc mosfet by matching the gate capacitance and mobility enhancement
Luo, Y. C., Li, F. L., Hsieh, E. R., Liu, C. H., Chung, S. S., Chen, T. P., Huang, S. A., Chen, T. J. & Chenz, O., 2019 四月, 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019. Institute of Electrical and Electronics Engineers Inc., 8804688. (2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019).研究成果: 書貢獻/報告類型 › 會議論文篇章
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The understanding of gate capacitance matching on achieving a high performance NC MOSFET with sufficient mobility
Chiang, C. K., Husan, P., Lou, Y. C., Li, F. L., Hsieh, E. R., Liu, C. H. & Chung, S. S., 2019 六月, 2019 Silicon Nanoelectronics Workshop, SNW 2019. Institute of Electrical and Electronics Engineers Inc., 8782951. (2019 Silicon Nanoelectronics Workshop, SNW 2019).研究成果: 書貢獻/報告類型 › 會議論文篇章