Via minimization with associated constraints in three-layer routing problem

Sung Chuan Fang, Kuo En Chang, Wu Shiung Feng

Research output: Contribution to journalConference articlepeer-review

5 Citations (Scopus)

Abstract

Via minimization is the same as the layer assignment problem in VLSI or PCB routing. It consists of determining which layers can be used for routing the wire segments such that the number of vias can be minimized. A heuristic algorithm is presented to globally eliminate the vias in the three-layer channel routing. Some associated constraints, such as restricted terminals and adjacent limitation, are addressed extensively. According to the results, the algorithm is fast and efficient, thus generating very good results.

Original languageEnglish
Pages (from-to)1632-1635
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume2
Publication statusPublished - 1990 Dec 1
Event1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4) - New Orleans, LA, USA
Duration: 1990 May 11990 May 3

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Via minimization with associated constraints in three-layer routing problem'. Together they form a unique fingerprint.

Cite this