Transport properties of ultra thin oxide gated Si SET near room temperature

Yue Min Wan*, Kuo Dong Huang, Ching Lung Sung, Shu Fen Hu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

We have fabricated ultrathin oxide (thickness) of ∼ 6 nm gated silicon transistors with a point-contact junction of ∼ 20 nm thick, and 20 nm wide to explore single electron charging effects near room temperature. Current-voltage (I-V) measurements show clear periodic oscillations and a dramatic collapse of peak's maximum at various temperatures. Analysis of energy spacing relates the charging energy to a dot of ∼8 nm in size and also suggesting tunneling is via the first excited state. These low-power ∼ 30 pW and low cost devices can be very useful for the next generation nanoelectronics.

Original languageEnglish
Title of host publication2005 5th IEEE Conference on Nanotechnology
PublisherIEEE Computer Society
Pages750-753
Number of pages4
ISBN (Print)0780391993, 9780780391994
DOIs
Publication statusPublished - 2005
Externally publishedYes
Event2005 5th IEEE Conference on Nanotechnology - Nagoya, Japan
Duration: 2005 Jul 112005 Jul 15

Publication series

Name2005 5th IEEE Conference on Nanotechnology
Volume2

Other

Other2005 5th IEEE Conference on Nanotechnology
Country/TerritoryJapan
CityNagoya
Period2005/07/112005/07/15

Keywords

  • Coulomb blockade
  • Current-voltage characteristics
  • Point-contact
  • Quantum dot
  • Single-electron transistor

ASJC Scopus subject areas

  • General Engineering

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