Transport properties of ultra thin oxide gated Si SET near room temperature

Yue Min Wan; Kuo Dong Huang; Ching Lung Sung; Shu Fen Hu

doi:10.1109/NANO.2005.1500639

Transport properties of ultra thin oxide gated Si SET near room temperature

Yue Min Wan^*, Kuo Dong Huang, Ching Lung Sung, Shu Fen Hu

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

We have fabricated ultrathin oxide (thickness) of ∼ 6 nm gated silicon transistors with a point-contact junction of ∼ 20 nm thick, and 20 nm wide to explore single electron charging effects near room temperature. Current-voltage (I-V) measurements show clear periodic oscillations and a dramatic collapse of peak's maximum at various temperatures. Analysis of energy spacing relates the charging energy to a dot of ∼8 nm in size and also suggesting tunneling is via the first excited state. These low-power ∼ 30 pW and low cost devices can be very useful for the next generation nanoelectronics.

Original language	English
Title of host publication	2005 5th IEEE Conference on Nanotechnology
Publisher	IEEE Computer Society
Pages	750-753
Number of pages	4
ISBN (Print)	0780391993, 9780780391994
DOIs	https://doi.org/10.1109/NANO.2005.1500639
Publication status	Published - 2005
Externally published	Yes
Event	2005 5th IEEE Conference on Nanotechnology - Nagoya, Japan Duration: 2005 Jul 11 → 2005 Jul 15

Publication series

Name	2005 5th IEEE Conference on Nanotechnology
Volume	2

Other

Other	2005 5th IEEE Conference on Nanotechnology
Country/Territory	Japan
City	Nagoya
Period	2005/07/11 → 2005/07/15

Keywords

Coulomb blockade
Current-voltage characteristics
Point-contact
Quantum dot
Single-electron transistor

ASJC Scopus subject areas

General Engineering

Access to Document

10.1109/NANO.2005.1500639

Cite this

Wan, YM, Huang, KD, Sung, CL & Hu, SF 2005, Transport properties of ultra thin oxide gated Si SET near room temperature. in 2005 5th IEEE Conference on Nanotechnology., 1500639, 2005 5th IEEE Conference on Nanotechnology, vol. 2, IEEE Computer Society, pp. 750-753, 2005 5th IEEE Conference on Nanotechnology, Nagoya, Japan, 2005/07/11. https://doi.org/10.1109/NANO.2005.1500639

@inproceedings{960e44ada32844b48b7c4f389c325651,

title = "Transport properties of ultra thin oxide gated Si SET near room temperature",

abstract = "We have fabricated ultrathin oxide (thickness) of ∼ 6 nm gated silicon transistors with a point-contact junction of ∼ 20 nm thick, and 20 nm wide to explore single electron charging effects near room temperature. Current-voltage (I-V) measurements show clear periodic oscillations and a dramatic collapse of peak's maximum at various temperatures. Analysis of energy spacing relates the charging energy to a dot of ∼8 nm in size and also suggesting tunneling is via the first excited state. These low-power ∼ 30 pW and low cost devices can be very useful for the next generation nanoelectronics.",

keywords = "Coulomb blockade, Current-voltage characteristics, Point-contact, Quantum dot, Single-electron transistor",

author = "Wan, {Yue Min} and Huang, {Kuo Dong} and Sung, {Ching Lung} and Hu, {Shu Fen}",

year = "2005",

doi = "10.1109/NANO.2005.1500639",

language = "English",

isbn = "0780391993",

series = "2005 5th IEEE Conference on Nanotechnology",

publisher = "IEEE Computer Society",

pages = "750--753",

booktitle = "2005 5th IEEE Conference on Nanotechnology",

note = "2005 5th IEEE Conference on Nanotechnology ; Conference date: 11-07-2005 Through 15-07-2005",

}

TY - GEN

T1 - Transport properties of ultra thin oxide gated Si SET near room temperature

AU - Wan, Yue Min

AU - Huang, Kuo Dong

AU - Sung, Ching Lung

AU - Hu, Shu Fen

PY - 2005

Y1 - 2005

N2 - We have fabricated ultrathin oxide (thickness) of ∼ 6 nm gated silicon transistors with a point-contact junction of ∼ 20 nm thick, and 20 nm wide to explore single electron charging effects near room temperature. Current-voltage (I-V) measurements show clear periodic oscillations and a dramatic collapse of peak's maximum at various temperatures. Analysis of energy spacing relates the charging energy to a dot of ∼8 nm in size and also suggesting tunneling is via the first excited state. These low-power ∼ 30 pW and low cost devices can be very useful for the next generation nanoelectronics.

AB - We have fabricated ultrathin oxide (thickness) of ∼ 6 nm gated silicon transistors with a point-contact junction of ∼ 20 nm thick, and 20 nm wide to explore single electron charging effects near room temperature. Current-voltage (I-V) measurements show clear periodic oscillations and a dramatic collapse of peak's maximum at various temperatures. Analysis of energy spacing relates the charging energy to a dot of ∼8 nm in size and also suggesting tunneling is via the first excited state. These low-power ∼ 30 pW and low cost devices can be very useful for the next generation nanoelectronics.

KW - Coulomb blockade

KW - Current-voltage characteristics

KW - Point-contact

KW - Quantum dot

KW - Single-electron transistor

UR - http://www.scopus.com/inward/record.url?scp=33746894605&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33746894605&partnerID=8YFLogxK

U2 - 10.1109/NANO.2005.1500639

DO - 10.1109/NANO.2005.1500639

M3 - Conference contribution

AN - SCOPUS:33746894605

SN - 0780391993

SN - 9780780391994

T3 - 2005 5th IEEE Conference on Nanotechnology

SP - 750

EP - 753

BT - 2005 5th IEEE Conference on Nanotechnology

PB - IEEE Computer Society

T2 - 2005 5th IEEE Conference on Nanotechnology

Y2 - 11 July 2005 through 15 July 2005

ER -

Transport properties of ultra thin oxide gated Si SET near room temperature

Abstract

Publication series

Other

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this