The enhancement of MOSFET electric performance through strain engineering by refilled sige as Source and Drain

Hsin Chia Yang; Chao Wang Li; Wen Shiang Liao; Chong Kuan Du; Mu Chun Wang; Jie Min Yang; Chun Wei Lian; Chuan Hsi Liu

doi:10.1109/INEC.2013.6466014

The enhancement of MOSFET electric performance through strain engineering by refilled sige as Source and Drain

Hsin Chia Yang, Chao Wang Li, Wen Shiang Liao, Chong Kuan Du, Mu Chun Wang^*, Jie Min Yang, Chun Wei Lian, Chuan Hsi Liu

^*Corresponding author for this work

Department of Mechatronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

Mismatched lattice constants between SiGe and silicon can cause the strain making the mobility improved. SiGe are grown underneath the channel apparently to form global strain over the whole devices, while Source/Drain refilled with SiGe would squeeze or pull up the devices uni-axially. The I_D-V _G characteristics curves and the maximum trans-conductance (g _m) using strain engineering are observed to be superior to the baseline. Nevertheless, the breakdown voltages with strain engineering no longer enjoy as robustly as ones without.

Original language	English
Title of host publication	Proceedings of the 2013 IEEE 5th International Nanoelectronics Conference, INEC 2013
Pages	251-253
Number of pages	3
DOIs	https://doi.org/10.1109/INEC.2013.6466014
Publication status	Published - 2013
Event	2013 IEEE 5th International Nanoelectronics Conference, INEC 2013 - Singapore, Singapore Duration: 2013 Jan 2 → 2013 Jan 4

Publication series

Name	Proceedings - Winter Simulation Conference
ISSN (Print)	0891-7736

Other

Other	2013 IEEE 5th International Nanoelectronics Conference, INEC 2013
Country/Territory	Singapore
City	Singapore
Period	2013/01/02 → 2013/01/04

Keywords

SiGe-Refilled Source/Drain
Strained Engineering

ASJC Scopus subject areas

Software
Modelling and Simulation
Computer Science Applications

Access to Document

10.1109/INEC.2013.6466014

Cite this

Yang, H. C., Li, C. W., Liao, W. S., Du, C. K., Wang, M. C., Yang, J. M., Lian, C. W., & Liu, C. H. (2013). The enhancement of MOSFET electric performance through strain engineering by refilled sige as Source and Drain. In Proceedings of the 2013 IEEE 5th International Nanoelectronics Conference, INEC 2013 (pp. 251-253). Article 6466014 (Proceedings - Winter Simulation Conference). https://doi.org/10.1109/INEC.2013.6466014

The enhancement of MOSFET electric performance through strain engineering by refilled sige as Source and Drain. / Yang, Hsin Chia; Li, Chao Wang; Liao, Wen Shiang et al.
Proceedings of the 2013 IEEE 5th International Nanoelectronics Conference, INEC 2013. 2013. p. 251-253 6466014 (Proceedings - Winter Simulation Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Yang, HC, Li, CW, Liao, WS, Du, CK, Wang, MC, Yang, JM, Lian, CW & Liu, CH 2013, The enhancement of MOSFET electric performance through strain engineering by refilled sige as Source and Drain. in Proceedings of the 2013 IEEE 5th International Nanoelectronics Conference, INEC 2013., 6466014, Proceedings - Winter Simulation Conference, pp. 251-253, 2013 IEEE 5th International Nanoelectronics Conference, INEC 2013, Singapore, Singapore, 2013/01/02. https://doi.org/10.1109/INEC.2013.6466014

@inproceedings{ee9730f9e53e45938ec23aee3b058643,

title = "The enhancement of MOSFET electric performance through strain engineering by refilled sige as Source and Drain",

abstract = "Mismatched lattice constants between SiGe and silicon can cause the strain making the mobility improved. SiGe are grown underneath the channel apparently to form global strain over the whole devices, while Source/Drain refilled with SiGe would squeeze or pull up the devices uni-axially. The ID-V G characteristics curves and the maximum trans-conductance (g m) using strain engineering are observed to be superior to the baseline. Nevertheless, the breakdown voltages with strain engineering no longer enjoy as robustly as ones without.",

keywords = "SiGe-Refilled Source/Drain, Strained Engineering",

author = "Yang, {Hsin Chia} and Li, {Chao Wang} and Liao, {Wen Shiang} and Du, {Chong Kuan} and Wang, {Mu Chun} and Yang, {Jie Min} and Lian, {Chun Wei} and Liu, {Chuan Hsi}",

year = "2013",

doi = "10.1109/INEC.2013.6466014",

language = "English",

isbn = "9781467348416",

series = "Proceedings - Winter Simulation Conference",

pages = "251--253",

booktitle = "Proceedings of the 2013 IEEE 5th International Nanoelectronics Conference, INEC 2013",

note = "2013 IEEE 5th International Nanoelectronics Conference, INEC 2013 ; Conference date: 02-01-2013 Through 04-01-2013",

}

TY - GEN

T1 - The enhancement of MOSFET electric performance through strain engineering by refilled sige as Source and Drain

AU - Yang, Hsin Chia

AU - Li, Chao Wang

AU - Liao, Wen Shiang

AU - Du, Chong Kuan

AU - Wang, Mu Chun

AU - Yang, Jie Min

AU - Lian, Chun Wei

AU - Liu, Chuan Hsi

PY - 2013

Y1 - 2013

N2 - Mismatched lattice constants between SiGe and silicon can cause the strain making the mobility improved. SiGe are grown underneath the channel apparently to form global strain over the whole devices, while Source/Drain refilled with SiGe would squeeze or pull up the devices uni-axially. The ID-V G characteristics curves and the maximum trans-conductance (g m) using strain engineering are observed to be superior to the baseline. Nevertheless, the breakdown voltages with strain engineering no longer enjoy as robustly as ones without.

AB - Mismatched lattice constants between SiGe and silicon can cause the strain making the mobility improved. SiGe are grown underneath the channel apparently to form global strain over the whole devices, while Source/Drain refilled with SiGe would squeeze or pull up the devices uni-axially. The ID-V G characteristics curves and the maximum trans-conductance (g m) using strain engineering are observed to be superior to the baseline. Nevertheless, the breakdown voltages with strain engineering no longer enjoy as robustly as ones without.

KW - SiGe-Refilled Source/Drain

KW - Strained Engineering

UR - http://www.scopus.com/inward/record.url?scp=84874775486&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84874775486&partnerID=8YFLogxK

U2 - 10.1109/INEC.2013.6466014

DO - 10.1109/INEC.2013.6466014

M3 - Conference contribution

AN - SCOPUS:84874775486

SN - 9781467348416

T3 - Proceedings - Winter Simulation Conference

SP - 251

EP - 253

BT - Proceedings of the 2013 IEEE 5th International Nanoelectronics Conference, INEC 2013

T2 - 2013 IEEE 5th International Nanoelectronics Conference, INEC 2013

Y2 - 2 January 2013 through 4 January 2013

ER -

The enhancement of MOSFET electric performance through strain engineering by refilled sige as Source and Drain

Abstract

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Keywords

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