Super fast hardware string matching+

Chia Tien Dan Lo, Yi Gang Tai, Kleanthis Psarris, Wen Jyi Hwang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

With the appearance of multi-gigabit network infrastructure, a typical network intrusion detection system (NIDS) has to cope with the network speed. By examining each packet flowing through a network segment, suspicious packets are detected and reported to assure security. Up to 57 % of the execution time in a NIDS is found to compare string against a predefined/known pattern. It is hard to implement a multigigabit performance NIDS without hardware support. This paper proposes a very high speed string matching algorithm which can be easily implemented into FPGAs. The parallel matching design takes a segment of text from the payload of a packet and detects all possible tokens including those crossing text segment boundaries. Simulation results show a throughput of 23.43 Gbps with a moderate operating frequency of 366.2 MHz.

Original languageEnglish
Title of host publicationProceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006
Pages385-388
Number of pages4
DOIs
Publication statusPublished - 2006 Dec 1
Event2006 IEEE International Conference on Field Programmable Technology, FPT 2006 - Bangkok, Thailand
Duration: 2006 Dec 132006 Dec 15

Publication series

NameProceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006

Other

Other2006 IEEE International Conference on Field Programmable Technology, FPT 2006
CountryThailand
CityBangkok
Period06/12/1306/12/15

Keywords

  • FPGAs
  • Intrusion detection
  • Network intrusion detection system
  • Security
  • String match algorithm

ASJC Scopus subject areas

  • Software

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