TY - GEN
T1 - Simulation of Poly-Silicon Thin Film Transistors with Negative Capacitance Effect
AU - Shang, Zong Wei
AU - Ma, Jun
AU - Liu, Wei Dong
AU - Zheng, Zhi Wei
AU - Cheng, Chun Hu
N1 - Funding Information:
ACKNOWLEDGMENT This work was supported in part by the Fundamental Research Funds for the Central Universities (Grant No. 20720190143) and the National Natural Science Foundation of China (Grant No. 61704141).
Publisher Copyright:
© 2019 IEEE.
PY - 2019/10
Y1 - 2019/10
N2 - In this work, we investigated the negative capacitance (NC) effect of ferroelectric HfAlO on the poly-silicon thin film transistor devices using high-\kappa HfO2 gate insulator by simulation. Excellent performances were achieved, including a high on-state drive current, a high Ion/Ioff of \gt10{7} and a low subthreshold swing of 58 mV/dec. These enhanced performances were related to the strong ferroelectric polarization inducing NC effect to obtain excellent gate controllability.
AB - In this work, we investigated the negative capacitance (NC) effect of ferroelectric HfAlO on the poly-silicon thin film transistor devices using high-\kappa HfO2 gate insulator by simulation. Excellent performances were achieved, including a high on-state drive current, a high Ion/Ioff of \gt10{7} and a low subthreshold swing of 58 mV/dec. These enhanced performances were related to the strong ferroelectric polarization inducing NC effect to obtain excellent gate controllability.
KW - negative capacitance effect
KW - poly-silicon
KW - thin film transistor
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U2 - 10.1109/ISNE.2019.8896500
DO - 10.1109/ISNE.2019.8896500
M3 - Conference contribution
AN - SCOPUS:85075640672
T3 - 2019 8th International Symposium on Next Generation Electronics, ISNE 2019
BT - 2019 8th International Symposium on Next Generation Electronics, ISNE 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 8th International Symposium on Next Generation Electronics, ISNE 2019
Y2 - 9 October 2019 through 10 October 2019
ER -