Abstract
In this letter, an on-chip electrostatic discharge (ESD) protection device was proposed for highspeed I/O interface circuits. A resistor-triggered siliconcontrolled rectifier device with improved performance was designed and investigated in a nanoscale CMOS process. As verified in a 0.18-μm CMOS process, the proposed design exhibits a lower clamping voltage and low enough overshoot voltage during ESD stress conditions, and lower parasitic capacitance and low enough leakage current during normal circuit operating conditions. Therefore, the proposed design is suitable for ESD protection of high-speed circuits in low-voltage CMOS processes.
Original language | English |
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Article number | 7907283 |
Pages (from-to) | 712-715 |
Number of pages | 4 |
Journal | IEEE Electron Device Letters |
Volume | 38 |
Issue number | 6 |
DOIs | |
Publication status | Published - 2017 Jun |
Keywords
- Electrostatic discharge (ESD)
- high-speed
- silicon-controlled rectifier (SCR).
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering