Punch-through and junction breakdown characteristics for uniaxial strained nano-node metal-oxide-semiconductor field-effect transistors on (100) wafers

Mu Chun Wang, Heng Sheng Huang, Min Ru Peng, Shea Jue Wang, Tsao Yeh Chen, Wen Shiang Liao, Hsin Chia Yang, Chuan-Hsi Liu

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

In the nano-regime MOSFET devices, the punch-through effect is more distinct, retarding the reliability tolerance, such as electro-static discharge or latch-up applications. Through the measurement in various device lengths under contact-etch-stop-layer strain process or without strain effect for 45 nm complementary MOS process, the difference of punch-through effect and junction breakdown integrity were able to be classified and exhibited in design applications. After tested data analysis, the junction breakdown issue in PMOSFET was usually greater than that in NMOSFET due to the doping concentrations and the doping species. Generally, the junction breakdown value is independent of channel length variation except the existence of some damage close to the gate/source or gate/drain fringe. In addition, the punch-through voltage for PMOSFET as source/drain current IDS = 1 μA is also larger than that observed for NMOSFET.

Original languageEnglish
Pages (from-to)25-40
Number of pages16
JournalInternational Journal of Materials and Product Technology
Volume49
Issue number1
DOIs
Publication statusPublished - 2014 Jan 1

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Keywords

  • CESL
  • Contact etch stop layer
  • Junction breakdown
  • MOSFET
  • Punch-through
  • Strain

ASJC Scopus subject areas

  • Safety, Risk, Reliability and Quality
  • Mechanics of Materials
  • Mechanical Engineering
  • Industrial and Manufacturing Engineering

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