Parasitic-insensitive linearization methods for 60-GHz 90-nm CMOS LNAs

Wei Tsung Li*, Jeng Han Tsai, Hong Yuan Yang, Wei Hung Chou, Shyh Buu Gea, Hsin Chia Lu, Tian Wei Huang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

35 Citations (Scopus)

Abstract

Two V-band low-noise amplifiers (LNAs) with excellent linearity and noise figure (NF) using 90-nm CMOS technology are demonstrated in this paper, employing parasitic-insensitive linearization topologies, i.e., cascode and common source, for comparative purposes. To improve the linearity without deteriorating the NF, the 54-69-GHz cascode LNA is linearized by the body-biased post-distortion, and the 58-65-GHz common-source LNA is linearized by the distributed derivative superposition. Using these parasitic-insensitive linearization methods at millimeter-wave frequency, the cascode LNA can achieve an IIP 3 of 11 dBm and an NF of 3.78 dB at 68.5 GHz with a gain of 13.2 dB and 14.4-mW dc power. The common-source LNA has an IIP 3 of 0 dBm and an NF of 4.1 dB at 64.5 GHz with a gain of 11.3 dB and 10.8-mW dc power. To the best of our knowledge, the proposed cascode LNA has up to 11-dBm IIP 3 performance and the highest figure-of-merit of 156.2, among all reported V-band LNAs.

Original languageEnglish
Article number6211461
Pages (from-to)2512-2523
Number of pages12
JournalIEEE Transactions on Microwave Theory and Techniques
Volume60
Issue number8
DOIs
Publication statusPublished - 2012

Keywords

  • 60 GHz
  • CMOS
  • high linearity
  • low-noise amplifier (LNA)
  • monolithic microwave integrated circuit (MMIC)

ASJC Scopus subject areas

  • Radiation
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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