Package-strain-enhanced device and circuit performance

S. Maikap, M. H. Liao, F. Yuan, M. H. Lee, C. F. Huang, S. T. Chang, C. W. Liu*

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

21 Citations (Scopus)


The hole mobility enhancement can be as high as -18% for SiO2 and ∼20% for high-κ HfO2 gate stack dielectrics with the uniaxial compressive strain (0.2%) parallel to the channel. The highest drain current of -22% at saturation and ∼30% at linear region is observed for the bulk Si PMOS with high-K gate stacks. The drain current and hole mobility of bulk Si PMOS are degraded under the small biaxial tensile strain, while substrate-strained Si device shows opposite. The nonoptimized ring oscillator has the speed enhancement of ∼7% under the uniaxial tensile strain parallel to NMOS channel. Proper package strain also gives the drive-current as well as mobility enhancement at 100°C.

Original languageEnglish
Pages (from-to)233-236
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting, IEDM
Publication statusPublished - 2004
Externally publishedYes
EventIEEE International Electron Devices Meeting, 2004 IEDM - San Francisco, CA, United States
Duration: 2004 Dec 132004 Dec 15

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry


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