Optimization of regular expression pattern matching circuits on FPGA

Cheng Hung Lin*, Chih Tsun Huang, Chang Ping Jiang, Shih Chieh Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

52 Citations (Scopus)


Regular expressions are widely used in Network Intrusion Detection System (NIDS) to represent patterns of network attacks. Since traditional software-only NIDS cannot catch up to the speed advance of networks, many previous works propose hardware architectures on FPGA to accelerate attack detection. The challenge of hardware implementation is to accommodate the regular expressions to FPGAs of the large number of attacks. Although the minimization of logic equations has been studied intensively in the CAD area, the minimization of multiple regular expressions has been largely neglected. This paper presents a novel architecture allowing our algorithm to extract and share common sub-regular expressions. Experimental results show that our sharing scheme significantly reduces the area of regular expression circuits.

Original languageEnglish
Title of host publicationProceedings - Design, Automation and Test in Europe, DATE'06
Publication statusPublished - 2006
Externally publishedYes
EventDesign, Automation and Test in Europe, DATE'06 - Munich, Germany
Duration: 2006 Mar 62006 Mar 10

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591


OtherDesign, Automation and Test in Europe, DATE'06

ASJC Scopus subject areas

  • General Engineering


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