On the electrical characteristics of ferroelectric FinFET using hafnium zirconium oxide with optimized gate stack

M. H. Lin, C. C. Fan, H. H. Hsu, C. Liu, K. M. Chen, C. H. Cheng, C. Y. Chang

Research output: Contribution to journalArticle


We investigated a short-channel ferroelectric FinFET using a ferroelectric HfZrO thin film as gate dielectrics, and scaled down the channel length to 60 nm to study the short-channel effect and the ferroelectricity. The HfZrO FinFETs exhibited improved short-channel performance including subthreshold swing improvement and reduced drain-induced barrier lowering effect. By using pulsed I–V measurement method, we confirmed that the thickness tradeoff between HfZrO ferroelectric layer and buffered layer are critical to alleviate the influence of interface traps and simultaneously obtain the ferroelectricity in HfZrO FinFET devices with the consideration of sidewall traps. Interface traps may cause unwanted off-state leakage current and mismatching negative capacitance. Here, we demonstrated that the ferroelectric behavior can be achieved by simultaneously increasing HfZrO thickness to obtain the optimized polarization and adopt appropriate buffered layer to screen the traps effect under ferroelectric domain switching.

Original languageEnglish
Pages (from-to)P640-P646
JournalECS Journal of Solid State Science and Technology
Issue number11
Publication statusPublished - 2018 Jan 1


ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials

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