Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching

Chien Liu; Hsuan Han Chen; Chih Chieh Hsu; Chia Chi Fan; Hsiao Hsuan Hsu; Chun Hu Cheng

doi:10.23919/VLSIT.2019.8776482

Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching

Chien Liu, Hsuan Han Chen, Chih Chieh Hsu, Chia Chi Fan, Hsiao Hsuan Hsu, Chun Hu Cheng

Department of Mechatronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

13 Citations (Scopus)

Abstract

We demonstrated that the 2.5nm-thick HfAIO_x N-type NCFET based on defect-passivated multidomain switching can achieve a minimum 9 mV/dec subthreshold swing (SS), a negligible hysteresis of 1mV, an ultralow I_off of 135fA/μm, a large I_on/I_0ff ratio of 8.7×10⁷ and a sub-60 mV/dec SS over 5 decade. For P-type NCFET, the non-hysteretic steep-slope switch is still reached under the synergistic effect of gate stress, defect passivation and doping engineering. The Al doping and defect passivation play the key role for reducing trap-related leakage, enhancing NC, and stabilizing multidomain switching. The highly scaled HfAIO_x CMOS NCFET shows the potential for low power logic applications.

Original language	English
Title of host publication	2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	T224-T225
ISBN (Electronic)	9784863487178
DOIs	https://doi.org/10.23919/VLSIT.2019.8776482
Publication status	Published - 2019 Jun
Event	39th Symposium on VLSI Technology, VLSI Technology 2019 - Kyoto, Japan Duration: 2019 Jun 9 → 2019 Jun 14

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
Volume	2019-June
ISSN (Print)	0743-1562

Conference

Conference	39th Symposium on VLSI Technology, VLSI Technology 2019
Country/Territory	Japan
City	Kyoto
Period	2019/06/09 → 2019/06/14

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.23919/VLSIT.2019.8776482

Cite this

Liu, C., Chen, H. H., Hsu, C. C., Fan, C. C., Hsu, H. H., & Cheng, C. H. (2019). Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching. In 2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers (pp. T224-T225). Article 8776482 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2019-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/VLSIT.2019.8776482

Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching. / Liu, Chien; Chen, Hsuan Han; Hsu, Chih Chieh et al.
2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 2019. p. T224-T225 8776482 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2019-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Liu, C, Chen, HH, Hsu, CC, Fan, CC, Hsu, HH & Cheng, CH 2019, Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching. in 2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers., 8776482, Digest of Technical Papers - Symposium on VLSI Technology, vol. 2019-June, Institute of Electrical and Electronics Engineers Inc., pp. T224-T225, 39th Symposium on VLSI Technology, VLSI Technology 2019, Kyoto, Japan, 2019/06/09. https://doi.org/10.23919/VLSIT.2019.8776482

Liu C, Chen HH, Hsu CC, Fan CC, Hsu HH, Cheng CH. Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching. In 2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc. 2019. p. T224-T225. 8776482. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.23919/VLSIT.2019.8776482

Liu, Chien ; Chen, Hsuan Han ; Hsu, Chih Chieh et al. / Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching. 2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 2019. pp. T224-T225 (Digest of Technical Papers - Symposium on VLSI Technology).

@inproceedings{937fbb36ba3d4c9b8d8418fe3ad4e128,

title = "Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching",

abstract = "We demonstrated that the 2.5nm-thick HfAIOx N-type NCFET based on defect-passivated multidomain switching can achieve a minimum 9 mV/dec subthreshold swing (SS), a negligible hysteresis of 1mV, an ultralow Ioff of 135fA/μm, a large Ion/I0ff ratio of 8.7×107 and a sub-60 mV/dec SS over 5 decade. For P-type NCFET, the non-hysteretic steep-slope switch is still reached under the synergistic effect of gate stress, defect passivation and doping engineering. The Al doping and defect passivation play the key role for reducing trap-related leakage, enhancing NC, and stabilizing multidomain switching. The highly scaled HfAIOx CMOS NCFET shows the potential for low power logic applications.",

author = "Chien Liu and Chen, {Hsuan Han} and Hsu, {Chih Chieh} and Fan, {Chia Chi} and Hsu, {Hsiao Hsuan} and Cheng, {Chun Hu}",

note = "Publisher Copyright: {\textcopyright} 2019 The Japan Society of Applied Physics.; 39th Symposium on VLSI Technology, VLSI Technology 2019 ; Conference date: 09-06-2019 Through 14-06-2019",

year = "2019",

month = jun,

doi = "10.23919/VLSIT.2019.8776482",

language = "English",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "T224--T225",

booktitle = "2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers",

}

TY - GEN

T1 - Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching

AU - Liu, Chien

AU - Chen, Hsuan Han

AU - Hsu, Chih Chieh

AU - Fan, Chia Chi

AU - Hsu, Hsiao Hsuan

AU - Cheng, Chun Hu

PY - 2019/6

Y1 - 2019/6

N2 - We demonstrated that the 2.5nm-thick HfAIOx N-type NCFET based on defect-passivated multidomain switching can achieve a minimum 9 mV/dec subthreshold swing (SS), a negligible hysteresis of 1mV, an ultralow Ioff of 135fA/μm, a large Ion/I0ff ratio of 8.7×107 and a sub-60 mV/dec SS over 5 decade. For P-type NCFET, the non-hysteretic steep-slope switch is still reached under the synergistic effect of gate stress, defect passivation and doping engineering. The Al doping and defect passivation play the key role for reducing trap-related leakage, enhancing NC, and stabilizing multidomain switching. The highly scaled HfAIOx CMOS NCFET shows the potential for low power logic applications.

AB - We demonstrated that the 2.5nm-thick HfAIOx N-type NCFET based on defect-passivated multidomain switching can achieve a minimum 9 mV/dec subthreshold swing (SS), a negligible hysteresis of 1mV, an ultralow Ioff of 135fA/μm, a large Ion/I0ff ratio of 8.7×107 and a sub-60 mV/dec SS over 5 decade. For P-type NCFET, the non-hysteretic steep-slope switch is still reached under the synergistic effect of gate stress, defect passivation and doping engineering. The Al doping and defect passivation play the key role for reducing trap-related leakage, enhancing NC, and stabilizing multidomain switching. The highly scaled HfAIOx CMOS NCFET shows the potential for low power logic applications.

UR - http://www.scopus.com/inward/record.url?scp=85070319546&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85070319546&partnerID=8YFLogxK

U2 - 10.23919/VLSIT.2019.8776482

DO - 10.23919/VLSIT.2019.8776482

M3 - Conference contribution

AN - SCOPUS:85070319546

T3 - Digest of Technical Papers - Symposium on VLSI Technology

SP - T224-T225

BT - 2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 39th Symposium on VLSI Technology, VLSI Technology 2019

Y2 - 9 June 2019 through 14 June 2019

ER -

Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching

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