Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching

Chien Liu, Hsuan Han Chen, Chih Chieh Hsu, Chia Chi Fan, Hsiao Hsuan Hsu, Chun Hu Cheng

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

We demonstrated that the 2.5nm-thick HfAIOx N-type NCFET based on defect-passivated multidomain switching can achieve a minimum 9 mV/dec subthreshold swing (SS), a negligible hysteresis of 1mV, an ultralow Ioff of 135fA/μm, a large Ion/I0ff ratio of 8.7×107 and a sub-60 mV/dec SS over 5 decade. For P-type NCFET, the non-hysteretic steep-slope switch is still reached under the synergistic effect of gate stress, defect passivation and doping engineering. The Al doping and defect passivation play the key role for reducing trap-related leakage, enhancing NC, and stabilizing multidomain switching. The highly scaled HfAIOx CMOS NCFET shows the potential for low power logic applications.

Original languageEnglish
Title of host publication2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesT224-T225
ISBN (Electronic)9784863487178
DOIs
Publication statusPublished - 2019 Jun
Event39th Symposium on VLSI Technology, VLSI Technology 2019 - Kyoto, Japan
Duration: 2019 Jun 92019 Jun 14

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume2019-June
ISSN (Print)0743-1562

Conference

Conference39th Symposium on VLSI Technology, VLSI Technology 2019
CountryJapan
CityKyoto
Period19/6/919/6/14

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Liu, C., Chen, H. H., Hsu, C. C., Fan, C. C., Hsu, H. H., & Cheng, C. H. (2019). Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching. In 2019 Symposium on VLSI Technology, VLSI Technology 2019 - Digest of Technical Papers (pp. T224-T225). [8776482] (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2019-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/VLSIT.2019.8776482