NBTI mechanism explored on the back gate bias for pMOSFETs

M. G. Chen, J. S. Li, C. Jiang, C. H. Liu, K. C. Su, Y. H. Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

Negative bias temperature instability had been getting more attention with the scaling down of MOS transistor, accompanied by the thinning of gate oxide. In our experiment of 0.15μm dual gate CMOS process, it is shown that surface hole concentration will have much impact on NBTI by means of Vsb application, no matter for devices of 2.6-nm or 6.5-nm oxide thickness. The NBTI enhancement at high Vsb is believed to be caused by the substrate hot hole injection, which leads to more interface state and positive charge generation, and thus makes NBTI worse. On the other hand, we expect better NBTI results under low gate electric field with Vsb applied, due to reduction of surface hole from Vsb.

Original languageEnglish
Title of host publication2003 IEEE International Integrated Reliability Workshop Final Report, IRW 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages131-132
Number of pages2
ISBN (Electronic)0780381572
DOIs
Publication statusPublished - 2003 Jan 1
Externally publishedYes
Event2003 IEEE International Integrated Reliability Workshop, IRW 2003 - Lake Tahoe, United States
Duration: 2003 Oct 202003 Oct 23

Publication series

NameIEEE International Integrated Reliability Workshop Final Report
Volume2003-January

Conference

Conference2003 IEEE International Integrated Reliability Workshop, IRW 2003
CountryUnited States
CityLake Tahoe
Period03/10/2003/10/23

    Fingerprint

Keywords

  • Computer hacking
  • Degradation
  • Hot carriers
  • MOSFETs
  • Niobium compounds
  • Stress
  • Substrate hot electron injection
  • Temperature
  • Threshold voltage
  • Titanium compounds

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Electronic, Optical and Magnetic Materials

Cite this

Chen, M. G., Li, J. S., Jiang, C., Liu, C. H., Su, K. C., & Chang, Y. H. (2003). NBTI mechanism explored on the back gate bias for pMOSFETs. In 2003 IEEE International Integrated Reliability Workshop Final Report, IRW 2003 (pp. 131-132). [1283319] (IEEE International Integrated Reliability Workshop Final Report; Vol. 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IRWS.2003.1283319