Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate

Chia Ching Yeo; M. H. Lee; C. W. Liu; K. J. Choi; T. W. Lee; B. J. Cho

doi:10.1109/EDSSC.2005.1635217

Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate

Chia Ching Yeo, M. H. Lee, C. W. Liu, K. J. Choi, T. W. Lee, B. J. Cho

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Metal gate/High-K slack CMOSFETs on ultra thin Ge epi channel on relaxed Si, capped with ultra thin Si (Si/Ge/Si substrate) were evaluated. NMOSFET shows enhanced mobility at low field while pMOSFET shows degraded peak mobility, with enhancement observed only at high field.

Original language	English
Title of host publication	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	107-110
Number of pages	4
ISBN (Print)	0780393392, 9780780393394
DOIs	https://doi.org/10.1109/EDSSC.2005.1635217
Publication status	Published - 2005
Externally published	Yes
Event	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC - Howloon, Hong Kong Duration: 2005 Dec 19 → 2005 Dec 21

Publication series

Name	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Other

Other	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
Country/Territory	Hong Kong
City	Howloon
Period	2005/12/19 → 2005/12/21

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/EDSSC.2005.1635217

Cite this

Yeo, C. C., Lee, M. H., Liu, C. W., Choi, K. J., Lee, T. W., & Cho, B. J. (2005). Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (pp. 107-110). Article 1635217 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2005.1635217

Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate. / Yeo, Chia Ching; Lee, M. H.; Liu, C. W. et al.
2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc., 2005. p. 107-110 1635217 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Yeo, CC, Lee, MH, Liu, CW, Choi, KJ, Lee, TW & Cho, BJ 2005, Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate. in 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC., 1635217, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Institute of Electrical and Electronics Engineers Inc., pp. 107-110, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Howloon, Hong Kong, 2005/12/19. https://doi.org/10.1109/EDSSC.2005.1635217

Yeo CC, Lee MH, Liu CW, Choi KJ, Lee TW, Cho BJ. Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc. 2005. p. 107-110. 1635217. (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). doi: 10.1109/EDSSC.2005.1635217

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abstract = "Metal gate/High-K slack CMOSFETs on ultra thin Ge epi channel on relaxed Si, capped with ultra thin Si (Si/Ge/Si substrate) were evaluated. NMOSFET shows enhanced mobility at low field while pMOSFET shows degraded peak mobility, with enhancement observed only at high field.",

author = "Yeo, {Chia Ching} and Lee, {M. H.} and Liu, {C. W.} and Choi, {K. J.} and Lee, {T. W.} and Cho, {B. J.}",

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doi = "10.1109/EDSSC.2005.1635217",

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Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate

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