Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate

Chia Ching Yeo, M. H. Lee, C. W. Liu, K. J. Choi, T. W. Lee, B. J. Cho

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Metal gate/High-K slack CMOSFETs on ultra thin Ge epi channel on relaxed Si, capped with ultra thin Si (Si/Ge/Si substrate) were evaluated. NMOSFET shows enhanced mobility at low field while pMOSFET shows degraded peak mobility, with enhancement observed only at high field.

Original languageEnglish
Title of host publication2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages107-110
Number of pages4
ISBN (Print)0780393392, 9780780393394
DOIs
Publication statusPublished - 2005 Jan 1
Event2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC - Howloon, Hong Kong
Duration: 2005 Dec 192005 Dec 21

Publication series

Name2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Other

Other2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
CountryHong Kong
CityHowloon
Period05/12/1905/12/21

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Fingerprint Dive into the research topics of 'Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate'. Together they form a unique fingerprint.

  • Cite this

    Yeo, C. C., Lee, M. H., Liu, C. W., Choi, K. J., Lee, T. W., & Cho, B. J. (2005). Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (pp. 107-110). [1635217] (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2005.1635217