A high resolution magnetic-field-to-digital converter (MDC) is presented. It is composed of a magnetic-field-to-pulse width converter (MPC), a cyclic pulse-shrinking time-to-digital converter (TDC) and a polarity detector. This prototype circuit has been fabricated in a 0.5μm CMOS DPDM process. With a clock rate of 16.6kHz, the power consumption is 42.5mW under 5V supply voltage. The equivalent resolution less than 16μT can be achieved within the range of ±10mT. After off-line calibration, the remaining offset is 0.017mT and its gain error is smaller than 0.4.
ASJC Scopus subject areas
- Electrical and Electronic Engineering