Abstract
In this letter, we report a low threshold voltage (Vt) of 0.12 V in self-aligned gate-first TaN/LaTiO n-MOSFETs, at an equivalent oxide thickness of only 0.63 nm. This was achieved by using Ni-induced solid-phase diffusion of SiO2-covered Ni/Sb that reduced the high-κ dielectric interfacial reactions.
| Original language | English |
|---|---|
| Pages (from-to) | 999-1001 |
| Number of pages | 3 |
| Journal | IEEE Electron Device Letters |
| Volume | 30 |
| Issue number | 9 |
| DOIs | |
| Publication status | Published - 2009 |
| Externally published | Yes |
Keywords
- LaTiO
- Low V
- Solid-phase diffusion (SPD)
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering