Low-threshold-voltage TaN/LaTiO n-MOSFETs with small EOT

S. H. Lin; C. H. Cheng; W. Barn Chen; F. Syeh Yeh; Albert Chin

doi:10.1109/LED.2009.2027723

Low-threshold-voltage TaN/LaTiO n-MOSFETs with small EOT

S. H. Lin^*, C. H. Cheng, W. Barn Chen, F. Syeh Yeh, Albert Chin

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

11 Citations (Scopus)

Abstract

In this letter, we report a low threshold voltage (V_t) of 0.12 V in self-aligned gate-first TaN/LaTiO n-MOSFETs, at an equivalent oxide thickness of only 0.63 nm. This was achieved by using Ni-induced solid-phase diffusion of SiO₂-covered Ni/Sb that reduced the high-κ dielectric interfacial reactions.

Original language	English
Pages (from-to)	999-1001
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	30
Issue number	9
DOIs	https://doi.org/10.1109/LED.2009.2027723
Publication status	Published - 2009
Externally published	Yes

Keywords

LaTiO
Low V
Solid-phase diffusion (SPD)

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/LED.2009.2027723

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title = "Low-threshold-voltage TaN/LaTiO n-MOSFETs with small EOT",

abstract = "In this letter, we report a low threshold voltage (Vt) of 0.12 V in self-aligned gate-first TaN/LaTiO n-MOSFETs, at an equivalent oxide thickness of only 0.63 nm. This was achieved by using Ni-induced solid-phase diffusion of SiO2-covered Ni/Sb that reduced the high-κ dielectric interfacial reactions.",

keywords = "LaTiO, Low V, Solid-phase diffusion (SPD)",

author = "Lin, {S. H.} and Cheng, {C. H.} and Chen, {W. Barn} and Yeh, {F. Syeh} and Albert Chin",

note = "Funding Information: Manuscript received May 15, 2009; revised June 21, 2009. First published August 19, 2009; current version published August 27, 2009. This work was supported in part by the National Science Council of Taiwan under Grant NSC 97-2120-M-009-008. The review of this letter was arranged by Editor M. Ostling.",

year = "2009",

doi = "10.1109/LED.2009.2027723",

language = "English",

volume = "30",

pages = "999--1001",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "9",

}

TY - JOUR

T1 - Low-threshold-voltage TaN/LaTiO n-MOSFETs with small EOT

AU - Lin, S. H.

AU - Cheng, C. H.

AU - Chen, W. Barn

AU - Yeh, F. Syeh

AU - Chin, Albert

N1 - Funding Information: Manuscript received May 15, 2009; revised June 21, 2009. First published August 19, 2009; current version published August 27, 2009. This work was supported in part by the National Science Council of Taiwan under Grant NSC 97-2120-M-009-008. The review of this letter was arranged by Editor M. Ostling.

PY - 2009

Y1 - 2009

N2 - In this letter, we report a low threshold voltage (Vt) of 0.12 V in self-aligned gate-first TaN/LaTiO n-MOSFETs, at an equivalent oxide thickness of only 0.63 nm. This was achieved by using Ni-induced solid-phase diffusion of SiO2-covered Ni/Sb that reduced the high-κ dielectric interfacial reactions.

AB - In this letter, we report a low threshold voltage (Vt) of 0.12 V in self-aligned gate-first TaN/LaTiO n-MOSFETs, at an equivalent oxide thickness of only 0.63 nm. This was achieved by using Ni-induced solid-phase diffusion of SiO2-covered Ni/Sb that reduced the high-κ dielectric interfacial reactions.

KW - LaTiO

KW - Low V

KW - Solid-phase diffusion (SPD)

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U2 - 10.1109/LED.2009.2027723

DO - 10.1109/LED.2009.2027723

M3 - Article

AN - SCOPUS:70049102515

SN - 0741-3106

VL - 30

SP - 999

EP - 1001

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 9

ER -

Low-threshold-voltage TaN/LaTiO n-MOSFETs with small EOT

Abstract

Keywords

ASJC Scopus subject areas

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