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Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure
Chun Hu Cheng*, K. I. Chou, Zhi Wei Zheng, Hsiao Hsuan Hsu
*Corresponding author for this work
Research output: Contribution to journal › Article › peer-review
12
Citations
(Scopus)