Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure

Chun Hu Cheng; K. I. Chou; Zhi Wei Zheng; Hsiao Hsuan Hsu

doi:10.1016/j.cap.2013.10.019

Low power resistive random access memory using interface-engineered dielectric stack of SiO_x/a-Si/TiO_y with 1D1R-like structure

Chun Hu Cheng^*, K. I. Chou, Zhi Wei Zheng, Hsiao Hsuan Hsu

^*Corresponding author for this work

Department of Mechatronic Engineering

Research output: Contribution to journal › Article › peer-review

12 Citations (Scopus)

Abstract

In this study, we report a resistive random access memory (RRAM) using trilayer SiO_x/a-Si/TiO_y film structure. The low switching energy of <10 pJ, highly uniform current distribution (<13% variation), fast 50-ns speed and stable cycling endurance for 10⁶ cycles are simultaneously achieved in this RRAM device. Such good performance can be ascribed to the use of interface-engineered dielectric stack with 1D1R-like structure. The SiO_x tunnel barrier in contact with top Ni electrode to form diode-like rectifying element not only lowers self-compliance switching currents, but also improves cycling endurance, which is favorable for the application of high-density 3D memory.

Original language	English
Pages (from-to)	139-143
Number of pages	5
Journal	Current Applied Physics
Volume	14
Issue number	1
DOIs	https://doi.org/10.1016/j.cap.2013.10.019
Publication status	Published - 2014

Keywords

Current distribution
Resistive random access memory (RRAM)
SiO
TiO

ASJC Scopus subject areas

General Materials Science
General Physics and Astronomy

Access to Document

10.1016/j.cap.2013.10.019

Cite this

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title = "Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure",

abstract = "In this study, we report a resistive random access memory (RRAM) using trilayer SiOx/a-Si/TiOy film structure. The low switching energy of <10 pJ, highly uniform current distribution (<13% variation), fast 50-ns speed and stable cycling endurance for 106 cycles are simultaneously achieved in this RRAM device. Such good performance can be ascribed to the use of interface-engineered dielectric stack with 1D1R-like structure. The SiOx tunnel barrier in contact with top Ni electrode to form diode-like rectifying element not only lowers self-compliance switching currents, but also improves cycling endurance, which is favorable for the application of high-density 3D memory.",

keywords = "Current distribution, Resistive random access memory (RRAM), SiO, TiO",

author = "Cheng, {Chun Hu} and Chou, {K. I.} and Zheng, {Zhi Wei} and Hsu, {Hsiao Hsuan}",

note = "Funding Information: This work was supported by the National Science Council (NSC) of Taiwan, Republic of China, under contract no. NSC 102-2221-E-003-019 .",

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T1 - Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure

AU - Cheng, Chun Hu

AU - Chou, K. I.

AU - Zheng, Zhi Wei

AU - Hsu, Hsiao Hsuan

N1 - Funding Information: This work was supported by the National Science Council (NSC) of Taiwan, Republic of China, under contract no. NSC 102-2221-E-003-019 .

PY - 2014

Y1 - 2014

N2 - In this study, we report a resistive random access memory (RRAM) using trilayer SiOx/a-Si/TiOy film structure. The low switching energy of <10 pJ, highly uniform current distribution (<13% variation), fast 50-ns speed and stable cycling endurance for 106 cycles are simultaneously achieved in this RRAM device. Such good performance can be ascribed to the use of interface-engineered dielectric stack with 1D1R-like structure. The SiOx tunnel barrier in contact with top Ni electrode to form diode-like rectifying element not only lowers self-compliance switching currents, but also improves cycling endurance, which is favorable for the application of high-density 3D memory.

AB - In this study, we report a resistive random access memory (RRAM) using trilayer SiOx/a-Si/TiOy film structure. The low switching energy of <10 pJ, highly uniform current distribution (<13% variation), fast 50-ns speed and stable cycling endurance for 106 cycles are simultaneously achieved in this RRAM device. Such good performance can be ascribed to the use of interface-engineered dielectric stack with 1D1R-like structure. The SiOx tunnel barrier in contact with top Ni electrode to form diode-like rectifying element not only lowers self-compliance switching currents, but also improves cycling endurance, which is favorable for the application of high-density 3D memory.

KW - Current distribution

KW - Resistive random access memory (RRAM)

KW - SiO

KW - TiO

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