Low-leakage-current DRAM-like memory using a one-transistor ferroelectric MOSFET with a Hf-based gate dielectric

Chun Hu Cheng, Albert Chin

Research output: Contribution to journalArticle

62 Citations (Scopus)

Abstract

The power consumption of capacitor leakage current, increase of the capacitor aspect ratio, and lack of higher dielectric constant (κ) material are the difficult challenges to downscaling dynamic random access memory (DRAM). This letter reports a new one-transistor ferroelectric-MOSFET (1T FeMOS) device that displays DRAM functions of a 5 ns switching time, 10 12 on/off endurance cycles, and 30 times on/off retention windows at 5 s and 85°C. A simple 1T process and a considerably low OFF-state leakage of 3× 10-12A/μ m were achieved. This novel device was achieved by applying ferroelectric ZrHfO gate dielectric to a p-MOSFET, which is fully compatible with existing high-κ CMOS processing.

Original languageEnglish
Article number6680625
Pages (from-to)138-140
Number of pages3
JournalIEEE Electron Device Letters
Volume35
Issue number1
DOIs
Publication statusPublished - 2014 Jan 1

Fingerprint

Gate dielectrics
Leakage currents
Ferroelectric materials
Transistors
Capacitors
Data storage equipment
Aspect ratio
Durability
Electric power utilization
Permittivity
Display devices
Processing

Keywords

  • 1T
  • DRAM
  • FeMOS
  • Ferroelectric
  • MOSFET
  • ZrHfO
  • memory

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Low-leakage-current DRAM-like memory using a one-transistor ferroelectric MOSFET with a Hf-based gate dielectric. / Cheng, Chun Hu; Chin, Albert.

In: IEEE Electron Device Letters, Vol. 35, No. 1, 6680625, 01.01.2014, p. 138-140.

Research output: Contribution to journalArticle

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