Improving ESD Robustness of pMOS Device With Embedded SCR in 28-nm High-k/Metal Gate CMOS Process

Chun-Yu Lin, Pin Hsin Chang, Rong Kun Chang

Research output: Contribution to journalArticle

8 Citations (Scopus)

Abstract

A pMOS device with an embedded silicon-controlled rectifier to improve its electrostatic discharge (ESD) robustness has been proposed and implemented in a 28-nm high-k/metal gate CMOS process. An additional p-type ESD implantation layer was added into the pMOS to realize the proposed device. The experimental results show that the proposed device has the advantages of high ESD robustness, low holding voltage, low parasitic capacitance, and good latchup immunity. With better performances, the proposed device was more suitable for ESD protection in a sub-50-nm CMOS process.

Original languageEnglish
Article number7038138
Pages (from-to)1349-1352
Number of pages4
JournalIEEE Transactions on Electron Devices
Volume62
Issue number4
DOIs
Publication statusPublished - 2015 Apr 1

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Electrostatic discharge
Thyristors
Metals
Capacitance
Electric potential

Keywords

  • Electrostatic discharge (ESD)
  • pMOS
  • silicon-controlled rectifier (SCR)

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Improving ESD Robustness of pMOS Device With Embedded SCR in 28-nm High-k/Metal Gate CMOS Process. / Lin, Chun-Yu; Chang, Pin Hsin; Chang, Rong Kun.

In: IEEE Transactions on Electron Devices, Vol. 62, No. 4, 7038138, 01.04.2015, p. 1349-1352.

Research output: Contribution to journalArticle

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