Improved stacked-diode ESD protection in nanoscale CMOS technology

An improved electrostatic discharge (ESD) protection design, using stacked diodes with silicon-controlled rectifier (SCR), is presented to protect the radio-frequency (RF) integrated circuits in nanoscale CMOS process. Using the stacked diodes and SCR together to form diode-triggered-SCR-like paths, the critical ESD current paths are enhanced. The test circuits of the proposed ESD protection and conventional designs are compared in silicon chip. As verified in a 0.18 µm CMOS process, the proposed design exhibits a lower clamping voltage and higher current handling ability during ESD stress conditions, and sufficiently low parasitic capacitance and leakage current during normal circuit operating conditions. Therefore, the proposed design is suitable for ESD protection of RF circuits in low-voltage CMOS process.