Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms

Yu Chien Chiu, Chun Yen Chang, Hsiao Hsuan Hsu, Chun-Hu Cheng, Min-Hung Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 1012-cycling endurance at 85oC. Such excellent endurance reliability at 85°C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.

Original languageEnglish
Title of host publication2015 IEEE International Reliability Physics Symposium, IRPS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesMY31-MY35
Volume2015-May
ISBN (Electronic)9781467373623
DOIs
Publication statusPublished - 2015 Jan 1
EventIEEE International Reliability Physics Symposium, IRPS 2015 - Monterey, United States
Duration: 2015 Apr 192015 Apr 23

Other

OtherIEEE International Reliability Physics Symposium, IRPS 2015
CountryUnited States
CityMonterey
Period15/4/1915/4/23

Fingerprint

Charge trapping
Transistors
Durability
Polarization
Data storage equipment
Threshold voltage
Ferroelectric materials
Temperature

Keywords

  • charge trapping
  • endurance
  • ferroelectric polarization
  • nonvolatile memory
  • retention

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Chiu, Y. C., Chang, C. Y., Hsu, H. H., Cheng, C-H., & Lee, M-H. (2015). Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms. In 2015 IEEE International Reliability Physics Symposium, IRPS 2015 (Vol. 2015-May, pp. MY31-MY35). [7112817] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IRPS.2015.7112817

Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms. / Chiu, Yu Chien; Chang, Chun Yen; Hsu, Hsiao Hsuan; Cheng, Chun-Hu; Lee, Min-Hung.

2015 IEEE International Reliability Physics Symposium, IRPS 2015. Vol. 2015-May Institute of Electrical and Electronics Engineers Inc., 2015. p. MY31-MY35 7112817.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chiu, YC, Chang, CY, Hsu, HH, Cheng, C-H & Lee, M-H 2015, Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms. in 2015 IEEE International Reliability Physics Symposium, IRPS 2015. vol. 2015-May, 7112817, Institute of Electrical and Electronics Engineers Inc., pp. MY31-MY35, IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, United States, 15/4/19. https://doi.org/10.1109/IRPS.2015.7112817
Chiu YC, Chang CY, Hsu HH, Cheng C-H, Lee M-H. Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms. In 2015 IEEE International Reliability Physics Symposium, IRPS 2015. Vol. 2015-May. Institute of Electrical and Electronics Engineers Inc. 2015. p. MY31-MY35. 7112817 https://doi.org/10.1109/IRPS.2015.7112817
Chiu, Yu Chien ; Chang, Chun Yen ; Hsu, Hsiao Hsuan ; Cheng, Chun-Hu ; Lee, Min-Hung. / Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms. 2015 IEEE International Reliability Physics Symposium, IRPS 2015. Vol. 2015-May Institute of Electrical and Electronics Engineers Inc., 2015. pp. MY31-MY35
@inproceedings{f40bff7168094d3db6b42023c036e8d7,
title = "Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms",
abstract = "We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 1012-cycling endurance at 85oC. Such excellent endurance reliability at 85°C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.",
keywords = "charge trapping, endurance, ferroelectric polarization, nonvolatile memory, retention",
author = "Chiu, {Yu Chien} and Chang, {Chun Yen} and Hsu, {Hsiao Hsuan} and Chun-Hu Cheng and Min-Hung Lee",
year = "2015",
month = "1",
day = "1",
doi = "10.1109/IRPS.2015.7112817",
language = "English",
volume = "2015-May",
pages = "MY31--MY35",
booktitle = "2015 IEEE International Reliability Physics Symposium, IRPS 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms

AU - Chiu, Yu Chien

AU - Chang, Chun Yen

AU - Hsu, Hsiao Hsuan

AU - Cheng, Chun-Hu

AU - Lee, Min-Hung

PY - 2015/1/1

Y1 - 2015/1/1

N2 - We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 1012-cycling endurance at 85oC. Such excellent endurance reliability at 85°C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.

AB - We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 1012-cycling endurance at 85oC. Such excellent endurance reliability at 85°C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.

KW - charge trapping

KW - endurance

KW - ferroelectric polarization

KW - nonvolatile memory

KW - retention

UR - http://www.scopus.com/inward/record.url?scp=84942931522&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84942931522&partnerID=8YFLogxK

U2 - 10.1109/IRPS.2015.7112817

DO - 10.1109/IRPS.2015.7112817

M3 - Conference contribution

AN - SCOPUS:84942931522

VL - 2015-May

SP - MY31-MY35

BT - 2015 IEEE International Reliability Physics Symposium, IRPS 2015

PB - Institute of Electrical and Electronics Engineers Inc.

ER -