Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms

Yu Chien Chiu, Chun Yen Chang, Hsiao Hsuan Hsu, Chun-Hu Cheng, Min-Hung Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 1012-cycling endurance at 85oC. Such excellent endurance reliability at 85°C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.

Original languageEnglish
Title of host publication2015 IEEE International Reliability Physics Symposium, IRPS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesMY31-MY35
Volume2015-May
ISBN (Electronic)9781467373623
DOIs
Publication statusPublished - 2015 Jan 1
EventIEEE International Reliability Physics Symposium, IRPS 2015 - Monterey, United States
Duration: 2015 Apr 192015 Apr 23

Other

OtherIEEE International Reliability Physics Symposium, IRPS 2015
CountryUnited States
CityMonterey
Period15/4/1915/4/23

Keywords

  • charge trapping
  • endurance
  • ferroelectric polarization
  • nonvolatile memory
  • retention

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Chiu, Y. C., Chang, C. Y., Hsu, H. H., Cheng, C-H., & Lee, M-H. (2015). Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms. In 2015 IEEE International Reliability Physics Symposium, IRPS 2015 (Vol. 2015-May, pp. MY31-MY35). [7112817] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IRPS.2015.7112817