High throughput and low area cost FPGA-based signature match circuit for network intrusion detection

Wen Jyi Hwang, Chien Min Ou, Ying Nan Shih, Chia Tien dan Lo

Research output: Contribution to journalArticle

8 Citations (Scopus)


A novel FPGA-based signature match circuit serving as the core of a hardware-based network intrusion detection system (NIDS) is presented in this paper. The circuit is based on simple shift registers and signature decoders for efficient hardware signature matches. As compared with related work, experimental results show that the proposed work achieves high throughput and uses few hardware resources in the FPGA implementations of NIDS systems.

Original languageEnglish
Pages (from-to)397-405
Number of pages9
JournalJournal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers,Series A/Chung-kuo Kung Ch'eng Hsuch K'an
Issue number3
Publication statusPublished - 2009 Jan 1



  • FPGA implementation
  • Network intrusion detection system
  • Pattern matching

ASJC Scopus subject areas

  • Engineering(all)

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