Abstract
This work experimentally demonstrated a one-transistor ferroelectric versatile memory with the multi-technique integration of negative-capacitance mechanism, ferroelectric polarization effect and metal-strained engineering. The negative-capacitance versatile memory featured a steep sub-60mV/dec subthreshold swing, fast 20-ns switching speed and long 10 12 cycled endurance. We successfully demonstrated that the metal-gate-induced strain could help to improve ferroelectric phase transformation. The excellent endurance characteristics could be ascribed to efficient ferroelectric negative-capacitance switching under low program/erase voltages.
| Original language | English |
|---|---|
| Title of host publication | Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017 |
| Editors | Yajie Qin, Ting-Ao Tang, Zhiliang Hong |
| Publisher | IEEE Computer Society |
| Pages | 1-5 |
| Number of pages | 5 |
| ISBN (Electronic) | 9781509066247 |
| DOIs | |
| Publication status | Published - 2018 Jan 8 |
| Event | 12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 - Guiyang, China Duration: 2017 Oct 25 → 2017 Oct 28 |
Publication series
| Name | Proceedings of International Conference on ASIC |
|---|---|
| Volume | 2017-October |
| ISSN (Print) | 2162-7541 |
| ISSN (Electronic) | 2162-755X |
Conference
| Conference | 12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 |
|---|---|
| Country | China |
| City | Guiyang |
| Period | 17/10/25 → 17/10/28 |
Fingerprint
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
High speed negative capacitance ferroelectric memory. / Chang, Chun Yen; Fan, Chia Chi; Liu, Chien; Chiu, Yu Chien; Cheng, Chun Hu.
Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. ed. / Yajie Qin; Ting-Ao Tang; Zhiliang Hong. IEEE Computer Society, 2018. p. 1-5 (Proceedings of International Conference on ASIC; Vol. 2017-October).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - High speed negative capacitance ferroelectric memory
AU - Chang, Chun Yen
AU - Fan, Chia Chi
AU - Liu, Chien
AU - Chiu, Yu Chien
AU - Cheng, Chun Hu
PY - 2018/1/8
Y1 - 2018/1/8
N2 - This work experimentally demonstrated a one-transistor ferroelectric versatile memory with the multi-technique integration of negative-capacitance mechanism, ferroelectric polarization effect and metal-strained engineering. The negative-capacitance versatile memory featured a steep sub-60mV/dec subthreshold swing, fast 20-ns switching speed and long 10 12 cycled endurance. We successfully demonstrated that the metal-gate-induced strain could help to improve ferroelectric phase transformation. The excellent endurance characteristics could be ascribed to efficient ferroelectric negative-capacitance switching under low program/erase voltages.
AB - This work experimentally demonstrated a one-transistor ferroelectric versatile memory with the multi-technique integration of negative-capacitance mechanism, ferroelectric polarization effect and metal-strained engineering. The negative-capacitance versatile memory featured a steep sub-60mV/dec subthreshold swing, fast 20-ns switching speed and long 10 12 cycled endurance. We successfully demonstrated that the metal-gate-induced strain could help to improve ferroelectric phase transformation. The excellent endurance characteristics could be ascribed to efficient ferroelectric negative-capacitance switching under low program/erase voltages.
UR - http://www.scopus.com/inward/record.url?scp=85044757727&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85044757727&partnerID=8YFLogxK
U2 - 10.1109/ASICON.2017.8252397
DO - 10.1109/ASICON.2017.8252397
M3 - Conference contribution
AN - SCOPUS:85044757727
T3 - Proceedings of International Conference on ASIC
SP - 1
EP - 5
BT - Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017
A2 - Qin, Yajie
A2 - Tang, Ting-Ao
A2 - Hong, Zhiliang
PB - IEEE Computer Society
ER -