High speed negative capacitance ferroelectric memory

Chun Yen Chang, Chia Chi Fan, Chien Liu, Yu Chien Chiu, Chun Hu Cheng

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work experimentally demonstrated a one-transistor ferroelectric versatile memory with the multi-technique integration of negative-capacitance mechanism, ferroelectric polarization effect and metal-strained engineering. The negative-capacitance versatile memory featured a steep sub-60mV/dec subthreshold swing, fast 20-ns switching speed and long 10 12 cycled endurance. We successfully demonstrated that the metal-gate-induced strain could help to improve ferroelectric phase transformation. The excellent endurance characteristics could be ascribed to efficient ferroelectric negative-capacitance switching under low program/erase voltages.

Original languageEnglish
Title of host publicationProceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017
EditorsYajie Qin, Ting-Ao Tang, Zhiliang Hong
PublisherIEEE Computer Society
Pages1-5
Number of pages5
ISBN (Electronic)9781509066247
DOIs
Publication statusPublished - 2018 Jan 8
Event12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 - Guiyang, China
Duration: 2017 Oct 252017 Oct 28

Publication series

NameProceedings of International Conference on ASIC
Volume2017-October
ISSN (Print)2162-7541
ISSN (Electronic)2162-755X

Conference

Conference12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017
CountryChina
CityGuiyang
Period17/10/2517/10/28

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ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Chang, C. Y., Fan, C. C., Liu, C., Chiu, Y. C., & Cheng, C. H. (2018). High speed negative capacitance ferroelectric memory. In Y. Qin, T-A. Tang, & Z. Hong (Eds.), Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017 (pp. 1-5). (Proceedings of International Conference on ASIC; Vol. 2017-October). IEEE Computer Society. https://doi.org/10.1109/ASICON.2017.8252397