TY - JOUR
T1 - High-bandwidth nonvolatile optical memory based on MMI-integrated racetrack resonator with embedded ReRAM
AU - Chen, Pin Zhi
AU - Chen, Ching Ting
AU - Lee, Chia Jung
AU - Lee, Ya Ju
AU - Huang, Cheng Liang
AU - Chuang, Ricky W.
N1 - Publisher Copyright:
© 2025 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement.
PY - 2025/11/17
Y1 - 2025/11/17
N2 - We present a nonvolatile, multilevel silicon photonic memory device that integrates a multimode interference (MMI) coupler with a micro-racetrack resonator (MRR) to enable broadband operation and wavelength-division multiplexing (WDM). To enhance light–matter interaction and reduce power consumption, high-index memory materials (BiFeO3, Al2O3) and an elevated film stack (EFS) structure are employed to embed the resistive random-access memory (ReRAM) layer within the cavity. A transparent ITO electrode improves mode confinement while maintaining electrical conductivity. The MMI design not only provides low insertion loss and high fabrication tolerance but also induces stronger cavity coupling, which shortens the photon lifetime and significantly broadens the resonance linewidth (FWHM in the 1.8–11.7 nm range, corresponding to 0.22–1.47 THz). Together with enlarged free spectral ranges (FSRs) of 9.9–16.9 nm, this MMI-enabled broadening improves memory state distinguishability, channel spacing, and operational stability. Three configurations were characterized under BFO cladding (i.e., ReRAM-integrated devices at 0 V bias): a 50 µm racetrack with an FSR of 16.86 nm and an FWHM of ∼7.9 nm (Lorentzian fit), a 100 µm racetrack with an FSR of 16.40 nm and an FWHM of ∼11.7 nm, and a cascaded 50 µm + 100 µm dual-racetrack filter with an FSR of 9.91 nm and an FWHM of ∼1.8 nm (Lorentzian fit). After integrating with high-index ReRAM layers, all configurations demonstrated tunable resonance shifts and robust broadband operation; notably, the 100 µm racetrack provided the widest linewidth (∼11.7 nm, corresponding to ∼1.47 THz). Under 0 V operation, logic states L1 and L2, compared to the initial state, exhibited wavelength shifts of 4.72 nm and 5.49 nm, with extinction ratios of 6.44 dB (77.3%) and 8.73 dB (86.6%), respectively, confirming the nonvolatile, multistate capability. Overall, this CMOS-compatible architecture offers broadband, scalable memory functionality with THz-level static optical bandwidth inferred from the FWHM, indicating strong potential for high-data-rate operation. This work opens opportunities for optical storage, logic circuits, and neuromorphic computing, and shows promising potential for future implementation in reconfigurable photonic systems.
AB - We present a nonvolatile, multilevel silicon photonic memory device that integrates a multimode interference (MMI) coupler with a micro-racetrack resonator (MRR) to enable broadband operation and wavelength-division multiplexing (WDM). To enhance light–matter interaction and reduce power consumption, high-index memory materials (BiFeO3, Al2O3) and an elevated film stack (EFS) structure are employed to embed the resistive random-access memory (ReRAM) layer within the cavity. A transparent ITO electrode improves mode confinement while maintaining electrical conductivity. The MMI design not only provides low insertion loss and high fabrication tolerance but also induces stronger cavity coupling, which shortens the photon lifetime and significantly broadens the resonance linewidth (FWHM in the 1.8–11.7 nm range, corresponding to 0.22–1.47 THz). Together with enlarged free spectral ranges (FSRs) of 9.9–16.9 nm, this MMI-enabled broadening improves memory state distinguishability, channel spacing, and operational stability. Three configurations were characterized under BFO cladding (i.e., ReRAM-integrated devices at 0 V bias): a 50 µm racetrack with an FSR of 16.86 nm and an FWHM of ∼7.9 nm (Lorentzian fit), a 100 µm racetrack with an FSR of 16.40 nm and an FWHM of ∼11.7 nm, and a cascaded 50 µm + 100 µm dual-racetrack filter with an FSR of 9.91 nm and an FWHM of ∼1.8 nm (Lorentzian fit). After integrating with high-index ReRAM layers, all configurations demonstrated tunable resonance shifts and robust broadband operation; notably, the 100 µm racetrack provided the widest linewidth (∼11.7 nm, corresponding to ∼1.47 THz). Under 0 V operation, logic states L1 and L2, compared to the initial state, exhibited wavelength shifts of 4.72 nm and 5.49 nm, with extinction ratios of 6.44 dB (77.3%) and 8.73 dB (86.6%), respectively, confirming the nonvolatile, multistate capability. Overall, this CMOS-compatible architecture offers broadband, scalable memory functionality with THz-level static optical bandwidth inferred from the FWHM, indicating strong potential for high-data-rate operation. This work opens opportunities for optical storage, logic circuits, and neuromorphic computing, and shows promising potential for future implementation in reconfigurable photonic systems.
UR - https://www.scopus.com/pages/publications/105021044514
UR - https://www.scopus.com/pages/publications/105021044514#tab=citedBy
U2 - 10.1364/OE.575814
DO - 10.1364/OE.575814
M3 - Article
AN - SCOPUS:105021044514
SN - 1094-4087
VL - 33
SP - 48081
EP - 48099
JO - Optics Express
JF - Optics Express
IS - 23
ER -