TY - GEN
T1 - Hardware/software co-design for particle swarm optimization algorithm
AU - Li, Shih An
AU - Wong, Ching Chang
AU - Yu, Chia Jun
AU - Hsu, Chen Chien
N1 - Funding Information:
This work was partially supported by the National Science Council, Taiwan , under Grant NSC 97-2221-E-032-032 . The authors thank Jui-Pin Wang for his efforts to carry out additional experiments in a very restricted timeframe during the preparation of this paper.
PY - 2010
Y1 - 2010
N2 - This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating velocity and position of particles and a fitness evaluation module implemented on a soft-cored processor for evaluating the objective functions are respectively designed and work closely together to accelerate the evolution process. Thanks to a flexible design, the proposed approach can tackle various optimization problems of embedded applications without the need for hardware redesign. To compensate the deficiency in generating truly random numbers by hardware implementation, a particle re-initialization scheme is also presented in this paper to further improve the execution performance of the PSO. Experiment results have demonstrated that the proposed HW/SW co-design approach to realize PSO is capable of achieving a high-quality solution effectively.
AB - This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating velocity and position of particles and a fitness evaluation module implemented on a soft-cored processor for evaluating the objective functions are respectively designed and work closely together to accelerate the evolution process. Thanks to a flexible design, the proposed approach can tackle various optimization problems of embedded applications without the need for hardware redesign. To compensate the deficiency in generating truly random numbers by hardware implementation, a particle re-initialization scheme is also presented in this paper to further improve the execution performance of the PSO. Experiment results have demonstrated that the proposed HW/SW co-design approach to realize PSO is capable of achieving a high-quality solution effectively.
KW - Field programmable gate array (FPGA)
KW - HW/SW co-design
KW - Particle swarm optimization (PSO)
KW - System on a programmable chip (SOPC)
UR - http://www.scopus.com/inward/record.url?scp=78751481836&partnerID=8YFLogxK
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U2 - 10.1109/ICSMC.2010.5641826
DO - 10.1109/ICSMC.2010.5641826
M3 - Conference contribution
AN - SCOPUS:78751481836
SN - 9781424465880
T3 - Conference Proceedings - IEEE International Conference on Systems, Man and Cybernetics
SP - 3762
EP - 3767
BT - 2010 IEEE International Conference on Systems, Man and Cybernetics, SMC 2010
T2 - 2010 IEEE International Conference on Systems, Man and Cybernetics, SMC 2010
Y2 - 10 October 2010 through 13 October 2010
ER -