Genetic vector quantizer design on reconfigurable hardware

Ting Kuan Lin, Hui Ya Li, Wen Jyi Hwang*, Chien Min Ou, Sheng Kai Weng

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)


This paper presents a novel hardware architecture for genetic vector quantizer (VQ) design. The architecture is based on steady-state genetic algorithm (GA). It adopts a novel architecture based on shift registers for accelerating mutation and crossover operations while reducing area cost. It also uses a pipeline architecture for fitness evaluation. The proposed architecture has been embedded in a softcore CPU for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for VQ optimization attaining both high performance and low computational time.

Original languageEnglish
Title of host publicationSimulated Evolution and Learning - 7th International Conference, SEAL 2008, Proceedings
Number of pages10
Publication statusPublished - 2008
Event7th International Conference on Simulated Evolution and Learning, SEAL 2008 - Melbourne, VIC, Australia
Duration: 2008 Dec 72008 Dec 10

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume5361 LNAI
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Other7th International Conference on Simulated Evolution and Learning, SEAL 2008
CityMelbourne, VIC

ASJC Scopus subject areas

  • Theoretical Computer Science
  • General Computer Science


Dive into the research topics of 'Genetic vector quantizer design on reconfigurable hardware'. Together they form a unique fingerprint.

Cite this