General interconnection network with the consideration of locality in traffic

Shun Shii Lin*, Ferng Ching Lin

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

Abstract

A general interconnection network is proposed, taking into account locality of traffic. The network has log2N - log N maximum intercell delay, but when high locality occurs in the communications, the mean intercell delay decreases to O(1). The problem of how to map processors with a known traffic distribution onto the terminals of the network in order to minimize the mean intercell delay is analyzed and formulated as a quadratic assignment problem. The uses of this network as a partitioner, a permuter, a full switch and a generalized connection network is discussed.

Original languageEnglish
Pages297-301
Number of pages5
Publication statusPublished - 1989
Externally publishedYes
EventInternational Symposium on VLSI Technology, Systems and Applications - Proceedings of Technical Papers - Taipei, Taiwan
Duration: 1989 May 171989 May 19

Other

OtherInternational Symposium on VLSI Technology, Systems and Applications - Proceedings of Technical Papers
CityTaipei, Taiwan
Period1989/05/171989/05/19

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint

Dive into the research topics of 'General interconnection network with the consideration of locality in traffic'. Together they form a unique fingerprint.

Cite this