FPGA-based path planning using improved Ant Colony Optimization Algorithm

Chen Chien Hsu; Ru Yu Hou; Wen Chung Kao; Shih An Li

doi:10.1109/ICCE-Berlin.2015.7391304

FPGA-based path planning using improved Ant Colony Optimization Algorithm

Chen Chien Hsu^*, Ru Yu Hou, Wen Chung Kao, Shih An Li

^*Corresponding author for this work

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

This paper develops a novel path planning algorithm using improved ant colony optimization (ACO) and its FPGA implementation. The proposed approach can effectively increase the accuracy to generate an optimal path. The main idea of this paper is to avoid local minimum by continuous tuning of a setting parameter and the establishment of new mechanisms for opposite pheromone updating and partial pheromone updating. Experimental results show that the execution efficiency of path planning is significantly improved by full hardware design for embedded applications.

Original language	English
Title of host publication	5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015
Editors	Jose Maria Flores-Arias, Stefan Mozar, Dietmar Hepper, Milan Z. Bjelica, Hans L. Cycon
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	443-444
Number of pages	2
ISBN (Electronic)	9781479987481
DOIs	https://doi.org/10.1109/ICCE-Berlin.2015.7391304
Publication status	Published - 2016 Jan 25
Event	5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015 - Berlin, Germany Duration: 2015 Sept 6 → 2015 Sept 9

Publication series

Name	5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015

Other

Other	5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015
Country/Territory	Germany
City	Berlin
Period	2015/09/06 → 2015/09/09

Keywords

Ant Colony Optimization Algorithm
FPGA
Path Planning

ASJC Scopus subject areas

Computer Networks and Communications
Computer Science Applications
Hardware and Architecture
Media Technology

Access to Document

10.1109/ICCE-Berlin.2015.7391304

Cite this

Hsu, C. C., Hou, R. Y., Kao, W. C., & Li, S. A. (2016). FPGA-based path planning using improved Ant Colony Optimization Algorithm. In J. M. Flores-Arias, S. Mozar, D. Hepper, M. Z. Bjelica, & H. L. Cycon (Eds.), 5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015 (pp. 443-444). [7391304] (5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCE-Berlin.2015.7391304

FPGA-based path planning using improved Ant Colony Optimization Algorithm. / Hsu, Chen Chien; Hou, Ru Yu; Kao, Wen Chung et al.
5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015. ed. / Jose Maria Flores-Arias; Stefan Mozar; Dietmar Hepper; Milan Z. Bjelica; Hans L. Cycon. Institute of Electrical and Electronics Engineers Inc., 2016. p. 443-444 7391304 (5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Hsu, CC, Hou, RY, Kao, WC & Li, SA 2016, FPGA-based path planning using improved Ant Colony Optimization Algorithm. in JM Flores-Arias, S Mozar, D Hepper, MZ Bjelica & HL Cycon (eds), 5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015., 7391304, 5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015, Institute of Electrical and Electronics Engineers Inc., pp. 443-444, 5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015, Berlin, Germany, 2015/09/06. https://doi.org/10.1109/ICCE-Berlin.2015.7391304

Hsu CC, Hou RY, Kao WC, Li SA. FPGA-based path planning using improved Ant Colony Optimization Algorithm. In Flores-Arias JM, Mozar S, Hepper D, Bjelica MZ, Cycon HL, editors, 5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015. Institute of Electrical and Electronics Engineers Inc. 2016. p. 443-444. 7391304. (5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015). doi: 10.1109/ICCE-Berlin.2015.7391304

Hsu, Chen Chien ; Hou, Ru Yu ; Kao, Wen Chung et al. / FPGA-based path planning using improved Ant Colony Optimization Algorithm. 5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015. editor / Jose Maria Flores-Arias ; Stefan Mozar ; Dietmar Hepper ; Milan Z. Bjelica ; Hans L. Cycon. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 443-444 (5th IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2015).

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AB - This paper develops a novel path planning algorithm using improved ant colony optimization (ACO) and its FPGA implementation. The proposed approach can effectively increase the accuracy to generate an optimal path. The main idea of this paper is to avoid local minimum by continuous tuning of a setting parameter and the establishment of new mechanisms for opposite pheromone updating and partial pheromone updating. Experimental results show that the execution efficiency of path planning is significantly improved by full hardware design for embedded applications.

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FPGA-based path planning using improved Ant Colony Optimization Algorithm

Abstract

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Keywords

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