An energy-efficiency floating-capacitor switching (FCS) scheme is proposed for successive approximation register (SAR) analogue-to-digital converters (ADCs). By rearranging the switching order from the smallest capacitor to the largest one, the switching energy can be significantly reduced, especially in the first several DAC switchings. With the presented scheme, a 97.66 less switching energy can be achieved compared to the conventional architecture (Ginsburg and Chandrakasan, 2005 ).
ASJC Scopus subject areas
- Electrical and Electronic Engineering