Fast principal component analysis based on hardware architecture of generalized hebbian algorithm

Shiow Jyu Lin; Yi Tsan Hung; Wen Jyi Hwang

doi:10.1007/978-3-642-16493-4_51

Fast principal component analysis based on hardware architecture of generalized hebbian algorithm

Shiow Jyu Lin^*, Yi Tsan Hung, Wen Jyi Hwang

^*Corresponding author for this work

Department of Computer Science and Information Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

This paper presents a novel hardware architecture for fast principle component analysis (PCA). The architecture is developed based on generalized Hebbian algorithm (GHA). In the architecture, the updating of different synaptic weight vectors are divided into a number of stages. The results of precedent stages are used for the computation of subsequent stages for expediting training speed and lowering the area cost. The proposed architecture has been embedded in a system-on-programmable-chip (SOPC) platform for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for fast PCA in attaining both high performance and low computation time.

Original language	English
Title of host publication	Advances in Computation and Intelligence - 5th International Symposium, ISICA 2010, Proceedings
Pages	505-515
Number of pages	11
Edition	M4D
DOIs	https://doi.org/10.1007/978-3-642-16493-4_51
Publication status	Published - 2010
Event	5th International Symposium on Advances in Computation and Intelligence, ISICA 2010 - Wuhan, China Duration: 2010 Oct 22 → 2010 Oct 24

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Number	M4D
Volume	6382 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Other

Other	5th International Symposium on Advances in Computation and Intelligence, ISICA 2010
Country/Territory	China
City	Wuhan
Period	2010/10/22 → 2010/10/24

ASJC Scopus subject areas

Theoretical Computer Science
Computer Science(all)

Access to Document

10.1007/978-3-642-16493-4_51

Cite this

Lin, S. J., Hung, Y. T., & Hwang, W. J. (2010). Fast principal component analysis based on hardware architecture of generalized hebbian algorithm. In Advances in Computation and Intelligence - 5th International Symposium, ISICA 2010, Proceedings (M4D ed., pp. 505-515). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6382 LNCS, No. M4D). https://doi.org/10.1007/978-3-642-16493-4_51

Fast principal component analysis based on hardware architecture of generalized hebbian algorithm. / Lin, Shiow Jyu; Hung, Yi Tsan; Hwang, Wen Jyi.
Advances in Computation and Intelligence - 5th International Symposium, ISICA 2010, Proceedings. M4D. ed. 2010. p. 505-515 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6382 LNCS, No. M4D).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Lin, SJ, Hung, YT & Hwang, WJ 2010, Fast principal component analysis based on hardware architecture of generalized hebbian algorithm. in Advances in Computation and Intelligence - 5th International Symposium, ISICA 2010, Proceedings. M4D edn, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), no. M4D, vol. 6382 LNCS, pp. 505-515, 5th International Symposium on Advances in Computation and Intelligence, ISICA 2010, Wuhan, China, 2010/10/22. https://doi.org/10.1007/978-3-642-16493-4_51

Lin SJ, Hung YT, Hwang WJ. Fast principal component analysis based on hardware architecture of generalized hebbian algorithm. In Advances in Computation and Intelligence - 5th International Symposium, ISICA 2010, Proceedings. M4D ed. 2010. p. 505-515. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); M4D). doi: 10.1007/978-3-642-16493-4_51

Lin, Shiow Jyu ; Hung, Yi Tsan ; Hwang, Wen Jyi. / Fast principal component analysis based on hardware architecture of generalized hebbian algorithm. Advances in Computation and Intelligence - 5th International Symposium, ISICA 2010, Proceedings. M4D. ed. 2010. pp. 505-515 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); M4D).

@inproceedings{6f91b1993a9f4b70aa9700d553c211ce,

title = "Fast principal component analysis based on hardware architecture of generalized hebbian algorithm",

abstract = "This paper presents a novel hardware architecture for fast principle component analysis (PCA). The architecture is developed based on generalized Hebbian algorithm (GHA). In the architecture, the updating of different synaptic weight vectors are divided into a number of stages. The results of precedent stages are used for the computation of subsequent stages for expediting training speed and lowering the area cost. The proposed architecture has been embedded in a system-on-programmable-chip (SOPC) platform for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for fast PCA in attaining both high performance and low computation time.",

author = "Lin, {Shiow Jyu} and Hung, {Yi Tsan} and Hwang, {Wen Jyi}",

year = "2010",

doi = "10.1007/978-3-642-16493-4_51",

language = "English",

isbn = "3642164927",

series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

number = "M4D",

pages = "505--515",

booktitle = "Advances in Computation and Intelligence - 5th International Symposium, ISICA 2010, Proceedings",

edition = "M4D",

note = "5th International Symposium on Advances in Computation and Intelligence, ISICA 2010 ; Conference date: 22-10-2010 Through 24-10-2010",

}

TY - GEN

T1 - Fast principal component analysis based on hardware architecture of generalized hebbian algorithm

AU - Lin, Shiow Jyu

AU - Hung, Yi Tsan

AU - Hwang, Wen Jyi

PY - 2010

Y1 - 2010

N2 - This paper presents a novel hardware architecture for fast principle component analysis (PCA). The architecture is developed based on generalized Hebbian algorithm (GHA). In the architecture, the updating of different synaptic weight vectors are divided into a number of stages. The results of precedent stages are used for the computation of subsequent stages for expediting training speed and lowering the area cost. The proposed architecture has been embedded in a system-on-programmable-chip (SOPC) platform for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for fast PCA in attaining both high performance and low computation time.

AB - This paper presents a novel hardware architecture for fast principle component analysis (PCA). The architecture is developed based on generalized Hebbian algorithm (GHA). In the architecture, the updating of different synaptic weight vectors are divided into a number of stages. The results of precedent stages are used for the computation of subsequent stages for expediting training speed and lowering the area cost. The proposed architecture has been embedded in a system-on-programmable-chip (SOPC) platform for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for fast PCA in attaining both high performance and low computation time.

UR - http://www.scopus.com/inward/record.url?scp=78649518967&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=78649518967&partnerID=8YFLogxK

U2 - 10.1007/978-3-642-16493-4_51

DO - 10.1007/978-3-642-16493-4_51

M3 - Conference contribution

AN - SCOPUS:78649518967

SN - 3642164927

SN - 9783642164927

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 505

EP - 515

BT - Advances in Computation and Intelligence - 5th International Symposium, ISICA 2010, Proceedings

T2 - 5th International Symposium on Advances in Computation and Intelligence, ISICA 2010

Y2 - 22 October 2010 through 24 October 2010

ER -

Fast principal component analysis based on hardware architecture of generalized hebbian algorithm

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