Fast fuzzy c-means clustering based on low-cost high-performance VLSI architecture in reconfigurable hardware

Yao Jung Yeh; Hui Ya Li; Cheng Yen Yang; Wen Jyi Hwang

doi:10.1109/CSE.2010.22

Fast fuzzy c-means clustering based on low-cost high-performance VLSI architecture in reconfigurable hardware

Yao Jung Yeh, Hui Ya Li, Cheng Yen Yang, Wen Jyi Hwang

Department of Computer science & Information Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

This paper presents a novel low-cost and high-performance VLSI architecture for fuzzy c-means clustering. In the architecture, the operations at both the centroid and data levels are pipelined to attain high computational speed while consuming low hardware resources. In addition, the usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. Experimental results show that the proposed solution is an effective alternative for cluster analysis with low computational cost and high performance.

Original language	English
Title of host publication	Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010
Pages	112-118
Number of pages	7
DOIs	https://doi.org/10.1109/CSE.2010.22
Publication status	Published - 2010 Dec 1
Event	2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010 - Hong Kong, China Duration: 2010 Dec 11 → 2010 Dec 13

Publication series

Name	Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010

Other

Other	2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010
Country	China
City	Hong Kong
Period	10/12/11 → 10/12/13

Fingerprint

Keywords

Data clustering
FPGA
Fuzzy c-means
Fuzzy system
Reconfigurable computing
System on programmable chip

ASJC Scopus subject areas

Computer Science (miscellaneous)

Cite this

Yeh, Y. J., Li, H. Y., Yang, C. Y., & Hwang, W. J. (2010). Fast fuzzy c-means clustering based on low-cost high-performance VLSI architecture in reconfigurable hardware. In Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010 (pp. 112-118). [5692464] (Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010). https://doi.org/10.1109/CSE.2010.22

Fast fuzzy c-means clustering based on low-cost high-performance VLSI architecture in reconfigurable hardware. / Yeh, Yao Jung; Li, Hui Ya; Yang, Cheng Yen; Hwang, Wen Jyi.

Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010. 2010. p. 112-118 5692464 (Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Yeh, YJ, Li, HY, Yang, CY & Hwang, WJ 2010, Fast fuzzy c-means clustering based on low-cost high-performance VLSI architecture in reconfigurable hardware. in Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010., 5692464, Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010, pp. 112-118, 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010, Hong Kong, China, 10/12/11. https://doi.org/10.1109/CSE.2010.22

Yeh YJ, Li HY, Yang CY, Hwang WJ. Fast fuzzy c-means clustering based on low-cost high-performance VLSI architecture in reconfigurable hardware. In Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010. 2010. p. 112-118. 5692464. (Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010). https://doi.org/10.1109/CSE.2010.22

Yeh, Yao Jung ; Li, Hui Ya ; Yang, Cheng Yen ; Hwang, Wen Jyi. / Fast fuzzy c-means clustering based on low-cost high-performance VLSI architecture in reconfigurable hardware. Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010. 2010. pp. 112-118 (Proceedings - 2010 13th IEEE International Conference on Computational Science and Engineering, CSE 2010).

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Access to Document

10.1109/CSE.2010.22